Bill Dally joined NVIDIA in January 2009 as chief scientist, after spending 12 years at Stanford University, where he was chairman of the computer science department. Dally and his Stanford team developed the system architecture, network architecture, signaling, routing and synchronization technology that is found in most large parallel computers today.

Dally was previously at the Massachusetts Institute of Technology from 1986 to 1997, where he and his team built the J-Machine and the M-Machine, experimental parallel computer systems that pioneered the separation of mechanism from programming models and demonstrated very low overhead synchronization and communication mechanisms. From 1983 to 1986, he was at California Institute of Technology (CalTech), where he designed the MOSSIM Simulation Engine and the Torus Routing chip, which pioneered “wormhole” routing and virtual-channel flow control.

He is a member of the National Academy of Engineering, a Fellow of the American Academy of Arts & Sciences, a Fellow of the IEEE and the ACM, and has received the IEEE Seymour Cray Award and the ACM Maurice Wilkes award. He has published over 200 papers, holds over 50 issued patents, and is an author of two textbooks.

Dally received a bachelor’s degree in Electrical Engineering from Virginia Tech, a master’s in Electrical Engineering from Stanford University and a Ph.D. in Computer Science from CalTech.  He is a cofounder of Velio Communications and Stream Processors.

Computer Architecture, Parallel Programming Systems, Interconnection Networks, High-Performance Circuit Design

Michael Garland joined NVIDIA in 2006 and is one of the founding members of NVIDIA Research. He currently leads the Programming Systems and Applications Research Group. Dr. Garland holds B.S. and Ph.D. degrees in Computer Science from Carnegie Mellon University, and is an adjunct professor in the Department of Computer Science of the University of Illinois at Urbana-Champaign. He has published numerous articles in leading conferences and journals on a range of topics including surface simplification, remeshing, texture synthesis, novice-friendly modeling, free-form animation, scientific visualization, graph mining, and visualizing complex graphs. His current research interests include computer graphics and visualization, geometric algorithms, and parallel algorithms and programming models.

Parallel Algorithms, Parallel Programming Models, Computer Graphics, Geometric Algorithms

Tom Gray joined the Circuits Research group of NVIDIA in August 2011. Prior to NVIDIA, he worked on various transceiver design projects, high speed memory links, and high speed serial links for applications such as Ethernet, Fibre Channel, Infiniband, OIF, and PCI Express as a system architect at Nethra Imaging, ARM, Cadence, and IBM. He received the B.S. degree from Mississippi College in 1988, and the M.S. and Ph.D. degrees in electrical/computer engineering from North Carolina State University in 1990 and 1993, respectively.

High Speed Clocking Design/Analysis, High Speed Communications, High Speed SerDes Design, High Performance DSP Architectures/VLSI Implementation

Steve Keckler joined NVIDIA in December 2009 and leads the Architecture Research Group. He is also Professor of both Computer Science and Electrical and Computer Engineering at the University of Texas at Austin, where he has served on the faculty since 1998. His research team at UT-Austin developed scalable parallel processor and memory system architectures, including non-uniform cache architectures; explicit data graph execution processors, which merge dataflow execution with sequential memory semantics; and micro-interconnection networks to implement distributed processor protocols. All of these technologies were demonstrated in the TRIPS experimental computer system. Keckler was previously at the Massachusetts Institute of Technology from 1990 to 1998, where he led the development of the M-Machine experimental parallel computer system. He is a Fellow of the ACM, a Fellow of the IEEE, an Alfred P. Sloan Research Fellow, and a recipient of the NSF CAREER award, the ACM Grace Murray Hopper award, the President's Associates Teaching Excellence Award at UT-Austin, and the Edith and Peter O’Donnell award for Engineering. He earned a B.S. in Electrical Engineering from Stanford University and an M.S. and a Ph.D. in Computer Science from the Massachusetts Institute of Technology. Full list of publications

Parallel and Serial Computer Architectures, Memory Systems, Interconnection Networks, High-Performance Computing, Low-Power Computing

Alexander Keller joined NVIDIA in 2011 to lead advanced rendering research. Before he had been the chief scientist of mental images, where he played a key role in prototyping iray and drafted future products and strategies.

Prior to industry, Alexander Keller had been a full professor of computer graphics and scientific computing at Ulm University. He received awards for excellence in teaching, cooperation with industry, and belonged to the team receiving a technical achievement award from the AMPAS.

Alexander Keller holds a Ph.D. in computer science, authored more than 21 patents, and published more than 40 papers mainly in the area of quasi-Monte Carlo methods and photorealistic image synthesis.

Quasi-Monte Carlo Methods, Ray Tracing, Light Transport Simulation, Rendering Systems, Algorithms and Data Structures, Computer Graphics and Computer Vision, Scientific Computing

David Kirk is an NVIDIA Fellow and served from 1997 to 2009 as NVIDIA's chief scientist, a role in which he led the development of graphics technology for today’s most popular consumer entertainment platforms.

Kirk received the Distinguished Alumni award from the California Institute of Technology in 2009.  He was elected in 2006 to the National Academy of Engineering (NAE) for his role in bringing high-performance graphics to personal computers. He received in 2002 the SIGGRAPH Computer Graphics Achievement Award for his role in bringing high-performance computer graphics systems to the mass market.

Prior to coming NVIDIA, he served from 1993 to 1996 as chief scientist and head of technology for Crystal Dynamics, a video game manufacturing company. From 1989 to 1991, Dr. Kirk was an engineer for the Apollo Systems Division of HP.

Kirk is the inventor of more than 60 patents and patent applications relating to graphics design and has published more than 50 articles on graphics technology.  He also authored the popular textbook “Programming Massively Parallel Processors” along with co-author Wen-mei W. Hwu.  He holds B.S. and M.S. degrees in mechanical engineering from Massachusetts Institute of Technology and M.S. and Ph.D. degrees in computer science from California Institute of Technology.

Computer Architecture, Parallel Programming Systems, Interconnection Networks, High-Performance Circuit Design

David Luebke helped found NVIDIA Research in 2006 after eight years on the faculty of the University of Virginia. Luebke received his Ph.D. under Fred Brooks at the University of North Carolina in 1998. His principal research interests are real-time computer graphics and GPU computing. Luebke's honors include the NVIDIA Distinguished Inventor award, the NSF CAREER and DOE Early Career PI awards, and the ACM Symposium on Interactive 3D Graphics "Test of Time Award". Dr. Luebke has co-authored a book, a SIGGRAPH Electronic Theater piece, a major museum exhibit visited by over 110,000 people, and dozens of papers, articles, chapters, and patents.

Computer Graphics, GPU Computing

Chris Malachowsky co-founded NVIDIA in 1993 and has over 30 years of industry experience. He has been instrumental in managing, defining and driving the company's core technologies as it has grown from a startup to the global leader in visual and parallel computing. As an executive at NVIDIA, his roles have been diverse, heading numerous functions, including IT, operations, and all facets of the company's product engineering. He currently is responsible for NVIDIA's world-class research organization chartered with developing the strategic technologies that will help drive the company's future growth and success.

Malachowsky previously held engineering and technical leadership positions at HP and Sun Microsystems.

A recognized authority on integrated-circuit design and methodology, he has authored close to 40 patents. He holds a BSEE degree from the University of Florida and an MSCS degree from Santa Clara University. Both schools have honoured Malachowsky with Distinguished Alumnus awards.

Kari joined NVIDIA research in April 2011 to work in imaging and other mobile applications. He heads the Mobile Visual Computing Research team which works on topics related to cameras, imaging, and vision on mobile devices. Previously he was at Nokia (1999-2004 in Oulu, Finland; 2004-06 a visiting scientist at MIT CSAIL; 2006-11 at Nokia Research Center Palo Alto). He was one of the 3 Nokia Fellows in 2010 (6th in Nokia history), and a Member of CEO's Technology Council. Kari worked on standardizing mobile graphics APIs at Khronos (OpenGL ES, OpenVG) and JCP (M3G) and wrote with colleagues a book on Mobile 3D Graphics. In Palo Alto he started a research group working on mobile augmented reality and computational photography (including the FCam architecture for computational cameras).

Kari has a B.Sc. from the University of Minnesota, M.Sc. and Lic. Tech. from the University of Oulu (Finland), and Ph.D. from the University of Washington (Seattle), all in Computer Science / Engineering; MBA from the University of Oulu; and he worked as a research associate at Stanford University as the technical lead of the Digital Michelangelo Project.

For more details and publication list see here.

Mobile Visual Applications and Enablers (graphics and imaging), Computational Photography, Augmented Reality