Wen-Hao Liu  

 



  ![](/sites/default/files/person/Wen-Hao.Liu_.jpg)

  

 Wen-Hao Liu, received his Ph.D. degree in Computer Science from National Chiao Tung University, Taiwan in 2013. His research interests include routing, placement, clock synthesis, logic synthesis, and 3D-IC in electronic design automation (EDA) field. Wen-Hao has published more than 40 papers and 15 patents in this field, and he has served on the technical program committee of DAC, ICCAD, ISPD, and ASPDAC. Currently, Wen-Hao works at Nvidia Research as a Principal Research Scientist to explore the solutions for advanced VLSI-related challenges. Before he joined Nvidia, Wen-Hao was leading a 3D-IC group at Cadence Design Systems, and he was the core developer to architect several commercial EDA tools from scratch. In addition, Wen-Hao has involved in the technology node enablement for 16nm, 10nm, 7nm, 5nm, 3nm, and 2nm.



   Research Area(s)

[Circuits and VLSI Design](/index.php/research-area/circuits)

 

 

  

 Main Field of Interest

[Circuits and VLSI Design](/index.php/research-area/circuits)

 

  

 Google Scholar

[https://scholar.google.com/citations?user=sMprgccAAAAJ&hl=zh-TW](https://scholar.google.com/citations?user=sMprgccAAAAJ&hl=zh-TW)

 

  

 

 

 



 ### Publications

 

### 2024 

[GPU/ML-Enhanced Large Scale Global Routing Contest](/publication/2024-03_gpuml-enhanced-large-scale-global-routing-contest)

[Rongjian Liang](/person/rongjian-liang), Anthony Agnesina, [Wen-Hao Liu](/person/wen-hao-liu), Mark Haoxing Ren



[ISPD 2024](https://ispd.cc/ispd2024/index.php)