1. [Publications](/publications) 2. A 0.54pJ/b 20Gb/s Ground-Referenced Single-Ended Short-Haul Serial Link in 28nm CMOS for Advanced Packaging Applications # A 0.54pJ/b 20Gb/s Ground-Referenced Single-Ended Short-Haul Serial Link in 28nm CMOS for Advanced Packaging Applications ![](/sites/default/files/styles/wide/public/pubs/2013-02_A-0-54pJ/Capture.PNG?itok=dmeYLfJT) Laminated packages, silicon interposer substrates, and special-purpose package- to-package interconnect, together with 3D stacking of silicon components enable systems with greatly improved computational power, memory capacity and bandwidth. These package options offer very high-bandwidth channels between chips on the same substrate. We employ ground-referenced single- ended signaling, a charge-pump transmitter, and a co-designed channel to provide communication between multiple chips on one package with high bandwidth per pin and low energy per bit. ## Authors John Poulton (NVIDIA) [William Dally](/person/william-dally) [Xi Chen](/person/xi-chen) John Eyles (NVIDIA) [Trey Greer](/person/trey-greer) [Stephen Tell](/person/stephen-tell) [Tom Gray](/person/tom-gray) ## Publication Date Friday, February 1, 2013 ## Published in [ISSCC](http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=6487789) ## Research Area [Circuits and VLSI Design](/research-area/circuits-and-vlsi-design) ## Copyright This material is posted here with permission of the IEEE. Internal or personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution must be obtained from the IEEE by writing to .