1. [Publications](/index.php/publications) 2. An Energy Efficient Time-sharing Pyramid Pipeline for Multi-resolution Computer Vision # An Energy Efficient Time-sharing Pyramid Pipeline for Multi-resolution Computer Vision ![](/sites/default/files/styles/wide/public/pubs/2013-10_An-Energy-Efficient/Screen%20Shot%202013-10-15%20at%2016.07.01%20.png?itok=X9YLWd8c) We introduce an energy efficient time-sharing pyramid pipeline architecture designed for multi-resolution image analysis in mobile computer vision. The time-sharing pipeline efficiently reduces the off-chip memory traffic by re-organizing the data storage and processing order of an image pyramid. We build a parameterized image pyramid hardware generator and successfully evaluate the overall pyramid design space. Our results demonstrate that the time-sharing pyramid pipeline achieves about 50% of hardware savings in terms of area and power consumption compared to the traditional linear pipeline implementation. We also implement the multi-resolution Lucas-Kanade optical flow algorithm on the time-sharing pipeline, and demonstrate an order of magnitude savings in off-chip memory traffic and system energy consumption. ## Authors Qiuling Zhu (CMU) Navjot Garg (NVIDIA) Yun-Ta Tsai (NVIDIA) Kari Pulli (NVIDIA) ## Publication Date Tuesday, October 1, 2013 ## Published in [VLSI-SOC](http://vlsisoc2013.ozyegin.edu.tr/) ## Research Area [Computer Vision](/index.php/research-area/computer-vision) ## Uploaded Files [Pyramid\_Zhu\_2013.pdf](https://research.nvidia.com/sites/default/files/pubs/2013-10_An-Energy-Efficient/Pyramid_Zhu_2013.pdf "Open file in new window")523.9 KB ## Copyright This material is posted here with permission of the IEEE. Internal or personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution must be obtained from the IEEE by writing to .