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2. A 9.7fJ/Conv.-Step Capacitive Sensor Readout Circuit with Incremental Zoomed Time Domain Quantization
 
 # A 9.7fJ/Conv.-Step Capacitive Sensor Readout Circuit with Incremental Zoomed Time Domain Quantization

  ![Publication image](/sites/default/files/styles/wide/public/default_images/default.jpeg?itok=qUFsuJCP "Publication image")

 This paper presents a capacitive sensor readout circuit with an incremental zoom current-controlled oscillator (CCO)-based timedomain (TD) ΔΣM. It supports single-sensor measurement, leading to 2x savings in sensing hardware compared to dual-sensor schemes. A low-cost 5b TD-ΔΣM is implemented with a 7- stage ring-CCO and a double-PFD (DPFD) quantizer. To further boost its speed, a fast start-up scheme is designed for the CCO quantizer. Combining all these merits, the proposed readout circuit achieves 0.23fF resolution while dissipating only 61pJ per conversion with a short measurement time of 4.1μs. To the authors’ best knowledge, it realizes the best energy efficiency and shortest measurement time among all high-resolution capacitanceto-digital converters (CDCs) achieving over 12 ENOB.



 ## Authors



Zilong Shen (Peking University)

Xiyuan Tang (Peking University)

Zhongyi Wu (Peking University)

Haoyang Luo (Peking University)

Zongnan Wang (Peking University)

[Mingjie Liu](/person/mingjie-liu)

Xing Zhang (Peking University)

Yuan Wang (Peking University)

 

 

 ## Publication Date



Sunday, April 23, 2023

 

 ## Published in



[2023 IEEE Custom Integrated Circuits Conference (CICC)](https://ieeexplore.ieee.org/document/10121301)

 

 ## Research Area



[Circuits and VLSI Design](/research-area/circuits)

 

 

 ## External Links



[Paper Link](https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10121301)

 

 

 ## Copyright



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