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2. A 256 Gb/s DWDM Optical I/O in a 3D-stacked EIC/PIC Silicon Photonics Platform

 # A 256 Gb/s DWDM Optical I/O in a 3D-stacked EIC/PIC Silicon Photonics Platform

  ![Publication image](/sites/default/files/styles/wide/public/default_images/default.jpeg?itok=TfIobf92 "Publication image")

 ## Authors

[Nandish Mehta](/index.php/person/nandish-mehta)

[Angad Rekhi](/index.php/person/angad-rekhi)

[Nikola Nedovic](/index.php/person/nikola-nedovic)

[Sanquan Song](/index.php/person/sanquan-song)

[Ben Lee](/index.php/person/ben-lee)

[Georgios Kalogerakis](/index.php/person/georgios-kalogerakis)

[Li Xu](/index.php/person/li-xu)

[Brian Zimmer](/index.php/person/brian-zimmer)

[Stephen Tell](/index.php/person/stephen-tell)

[Yoshi Nishi](/index.php/person/yoshi-nishi)

[Xi Chen](/index.php/person/xi-chen)

[Ward Lopes](/index.php/person/ward-lopes)

[Trey Greer](/index.php/person/trey-greer)

[Tom Gray](/index.php/person/tom-gray)

 ## Publication Date

Sunday, March 15, 2026

 ## Published in

[OFC 2026](https://ieeexplore.ieee.org/abstract/document/11524967)

 ## Research Area

[Circuits and VLSI Design](/index.php/research-area/circuits-and-vlsi-design)

 ## Copyright

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