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Geraldo Pradipta

LEGO-Size: LLM-Enhanced GPU-Optimized Signoff-Accurate Differentiable VLSI Gate Sizing in Advanced Nodes
GOALPlace: Begin with the End in Mind
Invited Paper: 2024 ICCAD CAD Contest Problem C: Scalable Logic Gate Sizing using ML Techniques and GPU Acceleration
CircuitOps: An ML Infrastructure Enabling Generative AI for VLSI Circuit Optimization

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