Daniel Lustig ![](/sites/default/files/person/lustig_headshot.jpg) Dan Lustig joined NVIDIA Research in December 2015. He works in the area of computer architecture, with a particular focus on system architecture, memory system design, and memory consistency models. His PhD thesis focused on specifying and verifying microarchitectural enforcement of memory models. Dan received his PhD from Princeton in November 2015 under the supervision of Margaret Martonosi. He received his MA from Princeton in 2011 and his BSE from the University of Pennsylvania in 2009. He also received an Intel PhD Fellowship in 2013. Research Area(s) [Computer Architecture](/research-area/computer-architecture) [Programming Languages, Systems and Tools](/research-area/programming-languages-systems) Main Field of Interest [Computer Architecture](/research-area/computer-architecture) Google Scholar [https://scholar.google.com/citations?user=JgyxYiUAAAAJ&hl=en](https://scholar.google.com/citations?user=JgyxYiUAAAAJ&hl=en) ### Publications ### 2023 [Parsimony: Enabling SIMD/Vector Programming in Standard Compiler Flows](/publication/2023-02_parsimony-enabling-simdvector-programming-standard-compiler-flows) Vijay Kandiah, [Daniel Lustig](/person/daniel-lustig), Oreste Villa, [David Nellans](/person/david-nellans), Nikos Hardavellas [International Symposium on Code Generation and Optimization](https://dl.acm.org/doi/10.1145/3579990.3580019) ### 2022 [Mixed-Proxy Extensions for the NVIDIA PTX Memory Consistency Model](/publication/2022-06_mixed-proxy-extensions-nvidia-ptx-memory-consistency-model) [Daniel Lustig](/person/daniel-lustig), Simon Cooksey, Olivier Giroux [International Symposium on Computer Architecture (ISCA), Industry Track](https://dl.acm.org/doi/10.1145/3470496.3533045) IEEE Micro Top Picks in Computer Architecture (Honorable Mention) ### 2021 [GPS: A Global Publish-Subscribe Model for Multi-GPU Memory Management](/publication/2021-10_gps-global-publish-subscribe-model-multi-gpu-memory-management) [Harini Muthukrishnan](/person/harini-muthukrishnan), [Daniel Lustig](/person/daniel-lustig), [David Nellans](/person/david-nellans), Thomas Wenisch [International Symposium on Microarchitecture (MICRO)](https://dl.acm.org/doi/10.1145/3466752.3480088) Best Paper nominee, IEEE Micro Top Picks in Computer Architecture (Honorable Mention) [Efficient Multi-GPU Shared Memory via Automatic Optimization of Fine-Grained Transfers](/publication/2021-06_efficient-multi-gpu-shared-memory-automatic-optimization-fine-grained-transfers) [Harini Muthukrishnan](/person/harini-muthukrishnan), [David Nellans](/person/david-nellans), [Daniel Lustig](/person/daniel-lustig), Jeffrey Fessler, Thomas Wenisch [International Symposium on Computer Architecture (ISCA)](https://ieeexplore.ieee.org/document/9499752) [Need for Speed: Experiences Building a Trustworthy System-Level GPU Simulator.](/publication/2021-02_need-speed-experiences-building-trustworthy-system-level-gpu-simulator) Oreste Villa, [Daniel Lustig](/person/daniel-lustig), [Zi Yan](/person/zi-yan), Evgeny Bolotin, [Yaosheng Fu](/person/yaosheng-fu), [Niladrish Chatterjee](/person/niladrish-chatterjee), [Ted Jiang](/person/ted-jiang), [David Nellans](/person/david-nellans) [International Symposium on High Performance Computer Architecture (HPCA)](https://doi.org/10.1109/HPCA51647.2021.00077) ### 2020 [RealityCheck: Bringing Modularity, Hierarchy, and Abstraction to Automated Microarchitectural Memory Consistency Verification](/publication/2020-03_realitycheck-bringing-modularity-hierarchy-and-abstraction-automated) Yatin A. Manerkar, [Daniel Lustig](/person/daniel-lustig), Margaret Martonosi [arXiv](https://arxiv.org/abs/2003.04892) [HMG: Extending Cache Coherence Protocols Across Modern Hierarchical Multi-GPU Systems](/index.php/publication/2020-02_hmg-extending-cache-coherence-protocols-across-modern-hierarchical-multi-gpu) Xiaowei Ren, [Daniel Lustig](/index.php/person/daniel-lustig), Evgeny Bolotin, [Aamer Jaleel](/index.php/person/aamer-jaleel), Oreste Villa, [David Nellans](/index.php/person/david-nellans) [International Symposium on High Performance Computer Architecture (HPCA)](https://ieeexplore.ieee.org/document/9065597) ### 2019 [Translation Ranger: Operating System Support for Contiguity-Aware TLBs](/publication/2019-06_translation-ranger-operating-system-support-contiguity-aware-tlbs) [Zi Yan](/person/zi-yan), [Daniel Lustig](/person/daniel-lustig), [David Nellans](/person/david-nellans), Abhishek Bhattacharjee [International Symposium on Computer Architecture (ISCA)](https://dl.acm.org/doi/10.1145/3307650.3322223) [Security Verification through Automatic Hardware-Aware Exploit Synthesis: The CheckMate Approach.](/publication/2019-04_security-verification-through-automatic-hardware-aware-exploit-synthesis) Caroline Trippel, [Daniel Lustig](/person/daniel-lustig), Margaret Martonosi [IEEE Micro (Issue: Top Picks of the 2018 Computer Architecture Conferences)](https://ieeexplore.ieee.org/document/8686197) [A Formal Analysis of the NVIDIA PTX Memory Consistency Model.](/publication/2019-04_formal-analysis-nvidia-ptx-memory-consistency-model) [Daniel Lustig](/person/daniel-lustig), Sameer Sahasrabuddhe, Olivier Giroux [International Conference on Architectural Support for Programming Languages and…](https://dl.acm.org/doi/10.1145/3297858.3304043) IEEE Micro Top Picks in Computer Architecture (Honorable Mention) [Nimble Page Management for Tiered Memory Systems](/publication/2019-04_nimble-page-management-tiered-memory-systems) [Zi Yan](/person/zi-yan), [Daniel Lustig](/person/daniel-lustig), [David Nellans](/person/david-nellans), Abhishek Bhattacharjee [International Conference on Architectural Support for Programming Languages and…](https://dl.acm.org/doi/10.1145/3297858.3304024) ### 2018 [PipeProof: Automated Memory Consistency Proofs for Microarchitectural Specifications](/publication/2018-10_pipeproof-automated-memory-consistency-proofs-microarchitectural-specifications) Yatin A. Manerkar, [Daniel Lustig](/person/daniel-lustig), Margaret Martonosi, Aarti Gupta [International Symposium on Microarchitecture (MICRO)](https://ieeexplore.ieee.org/document/8574586) IEEE Micro Top Picks in Computer Architecture (Honorable Mention), Best Paper nominee [CheckMate: Automated Synthesis of Hardware Exploits and Security Litmus Tests](/publication/2018-10_checkmate-automated-synthesis-hardware-exploits-and-security-litmus-tests) Caroline Trippel, [Daniel Lustig](/person/daniel-lustig), Margaret Martonosi [International Symposium on Microarchitecture (MICRO)](https://ieeexplore.ieee.org/document/8574598) IEEE Micro Top Picks in Computer Architecture [Full-Stack Memory Model Verification with TriCheck](/publication/2018-05_full-stack-memory-model-verification-tricheck) Caroline Trippel, Yatin A. Manerkar, [Daniel Lustig](/person/daniel-lustig), [Michael Pellauer](/person/michael-pellauer), Margaret Martonosi [IEEE Micro (Issue: Top Picks of the 2017 Computer Architecture Conferences)](https://ieeexplore.ieee.org/document/8357999) [MeltdownPrime and SpectrePrime: Automatically-Synthesized Attacks Exploiting Invalidation-Based Coherence Protocols](/publication/2018-02_meltdownprime-and-spectreprime-automatically-synthesized-attacks-exploiting) Caroline Trippel, [Daniel Lustig](/person/daniel-lustig), Margaret Martonosi [arXiv](https://arxiv.org/abs/1802.03802) ### 2017 [RTLCheck: Verifying Memory Consistency in RTL Designs](/publication/2017-10_rtlcheck-verifying-memory-consistency-rtl-designs) Yatin A. Manerkar, [Daniel Lustig](/person/daniel-lustig), Margaret Martonosi, [Michael Pellauer](/person/michael-pellauer) [International Symposium on Microarchitecture (MICRO)](https://dl.acm.org/doi/10.1145/3123939.3124536) IEEE Micro Top Picks in Computer Architecture (Honorable Mention) [Weak Memory Models with Matching Axiomatic and Operational Definitions](/publication/2017-10_weak-memory-models-matching-axiomatic-and-operational-definitions) Sizhuo Zhang, Muralidaran Vijayaraghavan, [Daniel Lustig](/person/daniel-lustig), Arvind [arXiv](https://arxiv.org/abs/1710.04259) [Automated Synthesis of Comprehensive Memory Model Litmus Test Suites](/publication/2017-04_automated-synthesis-comprehensive-memory-model-litmus-test-suites) [Daniel Lustig](/person/daniel-lustig), Andrew Wright, Alexandros Papakonstantinou, Olivier Giroux [International Conference on Architectural Support for Programming Languages and…](https://dl.acm.org/doi/10.1145/3037697.3037723) [TriCheck: Memory Model Verification at the Trisection of Software, Hardware, and ISA](/publication/2017-04_tricheck-memory-model-verification-trisection-software-hardware-and-isa) Caroline Trippel, Yatin A. Manerkar, [Daniel Lustig](/person/daniel-lustig), [Michael Pellauer](/person/michael-pellauer), Margaret Martonosi [International Conference on Architectural Support for Programming Languages and…](https://dl.acm.org/doi/10.1145/3093336.3037719) IEEE Micro Top Picks in Computer Architecture ### 2016 [Counterexamples and Proof Loophole for the C/C++ to POWER and ARMv7 Trailing-Sync Compiler Mappings](/publication/2016-11_counterexamples-and-proof-loophole-cc-power-and-armv7-trailing-sync-compiler) Yatin A. Manerkar, Caroline Trippel, [Daniel Lustig](/person/daniel-lustig), [Michael Pellauer](/person/michael-pellauer), Margaret Martonosi [arXiv](https://arxiv.org/abs/1611.01507) [TriCheck: Memory Model Verification at the Trisection of Software, Hardware, and ISA](/publication/2016-08_tricheck-memory-model-verification-trisection-software-hardware-and-isa) Caroline Trippel, Yatin A. Manerkar, [Daniel Lustig](/person/daniel-lustig), [Michael Pellauer](/person/michael-pellauer), Margaret Martonosi [arXiv](https://arxiv.org/abs/1608.07547) ### 2015 [CCICheck: Using μhb Graphs to Verify the Coherence-Consistency Interface](/publication/2015-12_ccicheck-using-mhb-graphs-verify-coherence-consistency-interface) Yatin A. Manerkar, [Daniel Lustig](/person/daniel-lustig), [Michael Pellauer](/person/michael-pellauer), Margaret Martonosi [International Symposium on Microarchitecture (MICRO)](https://ieeexplore.ieee.org/abstract/document/7856585) [Efficient Control and Communication Paradigms for Coarse-Grained Spatial Architectures](/publication/2015-09_efficient-control-and-communication-paradigms-coarse-grained-spatial) [Michael Pellauer](/person/michael-pellauer), [Angshuman Parashar](/person/angshuman-parashar), Michael Adler, Bushra Ahsan, Randy Almon, [Neal Crago](/person/neal-crago), Kermin Fleming, Mohit Gambhir, [Aamer Jaleel](/person/aamer-jaleel), Tushar Krishna, [Daniel Lustig](/person/daniel-lustig), Stephen Maresh, Vladimir Pavlov, Rachid Rayess, Antonia Zhai, [Joel Emer](/person/joel-emer) [ACM Transactions on Computing Systems (TOCS)](https://dl.acm.org/doi/10.1145/2754930)