Larry Dennison  

 



  ![](/sites/default/files/person/larry-dennison.jpg)

  

 Dr. Dennison joined NVIDIA in September of 2013 and leads the Network Research Group. His current research interests include large networks of GPUs, switch micro-architectures, network-on-chip and photonic interconnects. At, NVIDIA, he was the principal investigator for the DesignForward project which was responsible for several GPU shared-memory concepts such as NVSHMEM and NCCL. His team proposed development of a GPU shared memory fabric and developed the first NVSwitch architecture.

Prior to NVIDIA, he worked on software systems such as high-performance distributed applications, database scaling for the cloud and software-defined networking. He also architected and led the development of the ASIC chipset for the Avici Terabit Router which utilized a 3-D toroidal network. At BBN, Dr. Dennison was the principal investigator for MicroPathfinder, a wearable computer that connected to other wearables over a very low power RF network. Dr. Dennison holds Ph.D., M.S., and B.S. degrees from the Massachusetts Institute of Technology.



   Research Area(s)

[Networking](/research-area/networking)

 

 

  

 Google Scholar

[https://scholar.google.com/citations?user=MhxQRwsAAAAJ&hl=en](https://scholar.google.com/citations?user=MhxQRwsAAAAJ&hl=en)

 

  

 

 

 



 ### Publications

 

### 2020 

[An In-Network Architecture for Accelerating Shared-Memory Multiprocessor Collectives](/publication/2020-05_network-architecture-accelerating-shared-memory-multiprocessor-collectives)

[Benjamin Klenk](/person/ben-klenk), [Ted Jiang](/person/ted-jiang), Greg Thorson, [Larry Dennison](/person/larry-dennison)



[International Symposium on Computer Architecture (ISCA)](https://dl.acm.org/doi/10.1109/ISCA45697.2020.00085)









### 2018 

[Light-Weight Protocols for Wire-Speed Ordering](/publication/2018-11_light-weight-protocols-wire-speed-ordering)

[Hans Eberle](/person/hans-eberle), [Larry Dennison](/person/larry-dennison)



[Proceedings of the 30th International Conference for High Performance Computing…](https://sc18.supercomputing.org)









[Exploiting Idle Resources in a High-Radix Switch for Supplemental Storage](/index.php/publication/2018-11_exploiting-idle-resources-high-radix-switch-supplemental-storage)

[Matthias Blumrich](/index.php/person/matthias-blumrich), [Ted Jiang](/index.php/person/ted-jiang), [Larry Dennison](/index.php/person/larry-dennison)



[Proceedings of the International Conference for High Performance Computing, Net…](https://dl.acm.org/citation.cfm?id=3291662)









[Hardware-Enabled Artificial Intelligence](/index.php/publication/2018-06_hardware-enabled-artificial-intelligence)

[William Dally](/index.php/person/william-dally), [Tom Gray](/index.php/person/tom-gray), John Poulton, [Brucek Khailany](/index.php/person/brucek-khailany), [John Wilson](/index.php/person/john-wilson), [Larry Dennison](/index.php/person/larry-dennison)



Symposia on VLSI Technology and Circuits









### 2017 

[Relaxations for High-Performance Message Passing on Massively Parallel SIMT Processors](/publication/2017-06_relaxations-high-performance-message-passing-massively-parallel-simt-processors)

Benjamin Klenk, Holger Fröning, [Hans Eberle](/person/hans-eberle), [Larry Dennison](/person/larry-dennison)



[32nd IEEE International Parallel and Distributed Processing](http://www.ipdps.org)



Best Paper Award





### 2015 

[Network Endpoint Congestion Control for Fine-Grained Communication](/index.php/publication/2015-11_network-endpoint-congestion-control-fine-grained-communication)

[Ted Jiang](/index.php/person/ted-jiang), [Larry Dennison](/index.php/person/larry-dennison), [William Dally](/index.php/person/william-dally)



[SC15](http://dl.acm.org/citation.cfm?id=2807600)