Michael Pellauer ![](/sites/default/files/person/pellauer_0.jpg) Research Area(s) [Computer Architecture](/research-area/computer-architecture) ### Publications ### 2022 [Self Adaptive Reconfigurable Arrays (SARA): Learning Flexible GEMM Accelerator Configuration and Mapping-space using ML](/index.php/publication/2022-08_self-adaptive-reconfigurable-arrays-sara-learning-flexible-gemm-accelerator) Ananda Samajdar, Eric Qin, [Michael Pellauer](/index.php/person/michael-pellauer), Tushar Krishna [Design Automation Conference (DAC)](https://dl.acm.org/doi/abs/10.1145/3489517.3530506) [A Formalism of DNN Accelerator Flexibility](/index.php/publication/2022-06_formalism-dnn-accelerator-flexibility) Sheng-Chun Kao, Hyoukjun Kwon, [Michael Pellauer](/index.php/person/michael-pellauer), [Angshuman Parashar](/index.php/person/angshuman-parashar), Tushar Krishna [SIGMETRICS](https://dl.acm.org/doi/abs/10.1145/3530907) [DiGamma: Domain-aware Genetic Algorithm for HW-Mapping Co-optimization for DNN Accelerators](/publication/2022-03_digamma-domain-aware-genetic-algorithm-hw-mapping-co-optimization-dnn) Sheng-Chun Kao, [Michael Pellauer](/person/michael-pellauer), [Angshuman Parashar](/person/angshuman-parashar), Tushar Krishna [Design, Automation & Test in Europe (DATE)](https://dl.acm.org/doi/abs/10.5555/3539845.3539906) [Marvel: A Data-Centric Approach for Mapping Deep Learning Operators on Spatial Accelerators](/index.php/publication/2022-03_marvel-data-centric-approach-mapping-deep-learning-operators-spatial) Prasanth Chatarasi, Hyoukjun Kwon, [Angshuman Parashar](/index.php/person/angshuman-parashar), [Michael Pellauer](/index.php/person/michael-pellauer), Tushar Krishna, Vivek Sarkar [Transactions on Architecture and Code Optimization (TACO)](https://dl.acm.org/doi/full/10.1145/3485137) ### 2021 [Heterogeneous Dataflow Accelerators for Multi-DNN Workloads](/index.php/publication/2021-02_heterogeneous-dataflow-accelerators-multi-dnn-workloads) Hyoukjun Kwon, Liangzhen Lai, [Michael Pellauer](/index.php/person/michael-pellauer), Tushar Krishna, Yu-Hsin Chen, Vikas Chandra [International Symposium on High-Performance Computer Architecture (HPCA)](https://ieeexplore.ieee.org/document/9407116) [Flexion: A Quantitative Metric for Flexibility in DNN Accelerators](/index.php/publication/2021-01_flexion-quantitative-metric-flexibility-dnn-accelerators) Hyoukjun Kwon, [Michael Pellauer](/index.php/person/michael-pellauer), [Angshuman Parashar](/index.php/person/angshuman-parashar), Tushar Krishna [IEEE Computer Architecture Letters (CAL)](https://ieeexplore.ieee.org/document/9293373) ### 2020 [MAESTRO: A Data-Centric Approach to Understand Reuse, Performance, and Hardware Cost of DNN Mappings](/index.php/publication/2020-04_maestro-data-centric-approach-understand-reuse-performance-and-hardware-cost) Hyoukjun Kwon, Prasanth Chatarasi, Vivek Sarkar, Tushar Krishna, [Michael Pellauer](/index.php/person/michael-pellauer), [Angshuman Parashar](/index.php/person/angshuman-parashar) [IEEE Micro (Issue: Top Picks of the 2019 Computer Architecture Conferences)](https://ieeexplore.ieee.org/document/9076333) ### 2019 [ExTensor: An Accelerator for Sparse Tensor Algebra](/index.php/publication/2019-10_extensor-accelerator-sparse-tensor-algebra) Kartik Hegde, Hadi Asghari-Moghaddam, [Michael Pellauer](/index.php/person/michael-pellauer), [Neal Crago](/index.php/person/neal-crago), [Aamer Jaleel](/index.php/person/aamer-jaleel), Edgar Solomonik, [Joel Emer](/index.php/person/joel-emer), Christopher W. Fletcher [International Symposium on Microarchitecture (MICRO)](https://dl.acm.org/doi/10.1145/3352460.3358275) IEEE Micro Top Picks in Computer Architecture (Honorable Mention) [Understanding Reuse, Performance, and Hardware Cost of DNN Dataflows: A Data-Centric Approach.](/index.php/publication/2019-10_understanding-reuse-performance-and-hardware-cost-dnn-dataflows-data-centric) Hyoukjun Kwon, Prasanth Chatarasi, [Michael Pellauer](/index.php/person/michael-pellauer), [Angshuman Parashar](/index.php/person/angshuman-parashar), Vivek Sarkar, Tushar Krishna [International Symposium on Microarchitecture (MICRO)](https://dl.acm.org/doi/10.1145/3352460.3358252) IEEE Micro Top Picks in Computer Architecture [Buffets: An Efficient and Composable Storage Idiom for Explicit Decoupled Data Orchestration](/index.php/publication/2019-04_buffets-efficient-and-composable-storage-idiom-explicit-decoupled-data) [Michael Pellauer](/index.php/person/michael-pellauer), Yakun Sophia Shao, [Jason Clemons](/index.php/person/jason-clemons), [Neal Crago](/index.php/person/neal-crago), Kartik Hegde, [Rangharajan Venkatesan](/index.php/person/rangharajan-venkatesan), [Steve Keckler](/index.php/person/stephen-keckler), Christopher W. Fletcher, [Joel Emer](/index.php/person/joel-emer) [International Conference on Architectural Support for Programming Languages and…](https://dl.acm.org/doi/10.1145/3297858.3304025) IEEE Micro Top Picks in Computer Architecture (Honorable Mention) ### 2018 [A Modular Digital VLSI Flow for High-Productivity SoC Design](/index.php/publication/2018-06_modular-digital-vlsi-flow-high-productivity-soc-design) [Brucek Khailany](/index.php/person/brucek-khailany), Evgeni Krimer, [Rangharajan Venkatesan](/index.php/person/rangharajan-venkatesan), [Jason Clemons](/index.php/person/jason-clemons), [Joel Emer](/index.php/person/joel-emer), [Matt Fojtik](/index.php/person/matt-fojtik), Alicia Klinefelter, [Michael Pellauer](/index.php/person/michael-pellauer), [Nathaniel Pinckney](/index.php/person/nathaniel-pinckney), Sophia Shao, Shreesha Srinath, Christopher Torng, Sam (Likun) Xi, [Yanqing Zhang](/index.php/person/yanqing-zhang), [Brian Zimmer](/index.php/person/brian-zimmer) [Design Automation Conference (DAC)](https://dl.acm.org/doi/10.1145/3195970.3199846) [UCNN: Exploiting Computational Reuse in Deep Neural Networks via Weight Repetition](/index.php/publication/2018-06_ucnn-exploiting-computational-reuse-deep-neural-networks-weight-repetition) Kartik Hegde, Jiyong Yu, Rohit Agrawal, Mengjia Yan, [Michael Pellauer](/index.php/person/michael-pellauer), Christopher W. Fletcher [International Symposium on Computer Architecture (ISCA)](https://dl.acm.org/doi/10.1109/ISCA.2018.00062) [Full-Stack Memory Model Verification with TriCheck](/publication/2018-05_full-stack-memory-model-verification-tricheck) Caroline Trippel, Yatin A. Manerkar, [Daniel Lustig](/person/daniel-lustig), [Michael Pellauer](/person/michael-pellauer), Margaret Martonosi [IEEE Micro (Issue: Top Picks of the 2017 Computer Architecture Conferences)](https://ieeexplore.ieee.org/document/8357999) ### 2017 [RTLCheck: Verifying Memory Consistency in RTL Designs](/publication/2017-10_rtlcheck-verifying-memory-consistency-rtl-designs) Yatin A. Manerkar, [Daniel Lustig](/person/daniel-lustig), Margaret Martonosi, [Michael Pellauer](/person/michael-pellauer) [International Symposium on Microarchitecture (MICRO)](https://dl.acm.org/doi/10.1145/3123939.3124536) IEEE Micro Top Picks in Computer Architecture (Honorable Mention) [TriCheck: Memory Model Verification at the Trisection of Software, Hardware, and ISA](/publication/2017-04_tricheck-memory-model-verification-trisection-software-hardware-and-isa) Caroline Trippel, Yatin A. Manerkar, [Daniel Lustig](/person/daniel-lustig), [Michael Pellauer](/person/michael-pellauer), Margaret Martonosi [International Conference on Architectural Support for Programming Languages and…](https://dl.acm.org/doi/10.1145/3093336.3037719) IEEE Micro Top Picks in Computer Architecture ### 2016 [Counterexamples and Proof Loophole for the C/C++ to POWER and ARMv7 Trailing-Sync Compiler Mappings](/publication/2016-11_counterexamples-and-proof-loophole-cc-power-and-armv7-trailing-sync-compiler) Yatin A. Manerkar, Caroline Trippel, [Daniel Lustig](/person/daniel-lustig), [Michael Pellauer](/person/michael-pellauer), Margaret Martonosi [arXiv](https://arxiv.org/abs/1611.01507) [TriCheck: Memory Model Verification at the Trisection of Software, Hardware, and ISA](/publication/2016-08_tricheck-memory-model-verification-trisection-software-hardware-and-isa) Caroline Trippel, Yatin A. Manerkar, [Daniel Lustig](/person/daniel-lustig), [Michael Pellauer](/person/michael-pellauer), Margaret Martonosi [arXiv](https://arxiv.org/abs/1608.07547) ### 2015 [CCICheck: Using μhb Graphs to Verify the Coherence-Consistency Interface](/publication/2015-12_ccicheck-using-mhb-graphs-verify-coherence-consistency-interface) Yatin A. Manerkar, [Daniel Lustig](/person/daniel-lustig), [Michael Pellauer](/person/michael-pellauer), Margaret Martonosi [International Symposium on Microarchitecture (MICRO)](https://ieeexplore.ieee.org/abstract/document/7856585) [Efficient Control and Communication Paradigms for Coarse-Grained Spatial Architectures](/publication/2015-09_efficient-control-and-communication-paradigms-coarse-grained-spatial) [Michael Pellauer](/person/michael-pellauer), [Angshuman Parashar](/person/angshuman-parashar), Michael Adler, Bushra Ahsan, Randy Almon, [Neal Crago](/person/neal-crago), Kermin Fleming, Mohit Gambhir, [Aamer Jaleel](/person/aamer-jaleel), Tushar Krishna, [Daniel Lustig](/person/daniel-lustig), Stephen Maresh, Vladimir Pavlov, Rachid Rayess, Antonia Zhai, [Joel Emer](/person/joel-emer) [ACM Transactions on Computing Systems (TOCS)](https://dl.acm.org/doi/10.1145/2754930)