Mike O'Connor ![](/sites/default/files/person/HiRes-Mike_O%27Connor-3582-Edit.jpg) Mike O'Connor currently a Senior Manager and Research Scientist at NVIDIA in the Architecture Research group in the Austin, TX office. He leads a team of researchers focusing on enabling technologies for high-bandwidth, energy efficient future DRAM/NVRAM systems. He has broad interests in many areas of computer architecture, including: - High-Performance Memory Systems (DRAM and NVRAM) - GPU Architectures (both processing cores and cache/memory systems) - Low-power datapath design - Reliabilty/Resilience Research Area(s) [Artificial Intelligence and Machine Learning ](/research-area/machine-learning-artificial-intelligence) [High Performance Computing](/research-area/high-performance-computing) [Resilience and Safety](/research-area/resilience) Main Field of Interest [Computer Architecture](/research-area/computer-architecture) Google Scholar [https://scholar.google.com/citations?user=rc89KiIAAAAJ&hl=en](https://scholar.google.com/citations?user=rc89KiIAAAAJ&hl=en) ### Publications ### 2022 [Saving PAM4 Bus Energy with SMOREs: Sparse Multi-level Opportunistic Restricted Encodings](/publication/2022-04_saving-pam4-bus-energy-smores-sparse-multi-level-opportunistic-restricted) [Mike O'Connor](/person/mike-o-connor), [Donghyuk Lee](/person/donghyuk-lee), [Niladrish Chatterjee](/person/niladrish-chatterjee), [Michael B. Sullivan](/person/mike-sullivan), [Steve Keckler](/person/stephen-keckler) [International Symposium on High-Performance Computer Architecture (HPCA)](https://ieeexplore.ieee.org/document/9773229) [Characterizing and Mitigating Soft Errors in GPU DRAM](/publication/2022-03_characterizing-and-mitigating-soft-errors-gpu-dram) [Michael B. Sullivan](/person/mike-sullivan), Nirmal R. Saxena, [Mike O'Connor](/person/mike-o-connor), [Donghyuk Lee](/person/donghyuk-lee), Paul Racunas, Saurabh Hukerikar, Timothy Tsai, [Siva Kumar Sastry Hari](/person/siva-hari), [Stephen W. Keckler](/person/stephen-keckler) [IEEE Micro (Issue: Top Picks of the 2021 Computer Architecture Conferences)](https://ieeexplore.ieee.org/document/9744333) ### 2021 [Characterizing and Mitigating Soft Errors in GPU DRAM](/publication/2021-10_characterizing-and-mitigating-soft-errors-gpu-dram-0) [Michael B. Sullivan](/person/mike-sullivan), Nirmal Saxena, [Mike O'Connor](/person/mike-o-connor), [Donghyuk Lee](/person/donghyuk-lee), Paul Racunas, Saurabh Hukerikar, Timothy Tsai, [Siva Hari](/person/siva-hari), [Steve Keckler](/person/stephen-keckler) [International Symposium on Microarchitecture (MICRO)](https://dl.acm.org/doi/10.1145/3466752.3480111) IEEE Micro Top Picks in Computer Architecture [Learning Sparse Matrix Row Permutations for Efficient SpMM on GPU Architectures](/publication/2021-03_learning-sparse-matrix-row-permutations-efficient-spmm-gpu-architectures) Atefeh Mehrabi, [Donghyuk Lee](/person/donghyuk-lee), [Niladrish Chatterjee](/person/niladrish-chatterjee), Danial J. Sorin, Benjamin C. Lee, [Mike O'Connor](/person/mike-o-connor) [International Symposium on Performance Analysis of Systems and Software (ISPASS)](https://ieeexplore.ieee.org/document/9408181) ### 2020 [Buddy Compression: Enabling Larger Memory for Deep Learning and HPC Workloads on GPUs](/publication/2020-06_buddy-compression-enabling-larger-memory-deep-learning-and-hpc-workloads-gpus) Esha Chouske, [Michael B. Sullivan](/person/mike-sullivan), [Mike O'Connor](/person/mike-o-connor), Mattan Erez, Jeff Pool, [David Nellans](/person/david-nellans), [Steve Keckler](/person/stephen-keckler) [International Symposium on Computer Architecture (ISCA)](https://ieeexplore.ieee.org/document/9138915) ### 2019 [Near-Memory Data Transformation for Efficient Sparse Matrix Multi-Vector Multiplication](/publication/2019-11_near-memory-data-transformation-efficient-sparse-matrix-multi-vector) Daichi Fujiki, [Niladrish Chatterjee](/person/niladrish-chatterjee), [Donghyuk Lee](/person/donghyuk-lee), [Mike O'Connor](/person/mike-o-connor) [International Conference for High-Performance Computing, Networking, Storage, a…](https://dl.acm.org/doi/10.1145/3295500.3356154) [Buddy Compression: Enabling Larger Memory for Deep Learning and HPC Workloads on GPUs](/publication/2019-04_buddy-compression-enabling-larger-memory-deep-learning-and-hpc-workloads-gpus) Esha Choukse, [Michael B. Sullivan](/person/mike-sullivan), [Mike O'Connor](/person/mike-o-connor), Mattan Erez, Jeff Pool, [David Nellans](/person/david-nellans), Stephen W. Keckler [arXiv](https://arxiv.org/abs/1903.02596) [DeLTA: GPU Performance Model for Deep Learning Applications with In-depth Memory System Traffic Analysis](/index.php/publication/2019-04_delta-gpu-performance-model-deep-learning-applications-depth-memory-system) Sangkug Lym, [Donghyuk Lee](/index.php/person/donghyuk-lee), [Mike O'Connor](/index.php/person/mike-o-connor), [Niladrish Chatterjee](/index.php/person/niladrish-chatterjee), Mattan Erez [arXiv](https://arxiv.org/abs/1904.01691) [DeLTA: GPU Performance Model for Deep Learning Applications with In-depth Memory System Traffic Analysis](/publication/2019-03_delta-gpu-performance-model-deep-learning-applications-depth-memory-system) Sankug Lym, [Donghyuk Lee](/person/donghyuk-lee), [Niladrish Chatterjee](/person/niladrish-chatterjee), [Mike O'Connor](/person/mike-o-connor), Mattan Erez [International Symposium on Performance Analysis of Systems and Software (ISPASS)](https://ieeexplore.ieee.org/document/8695646) ### 2018 [What Your DRAM Power Models Are Not Telling You: Lessons from a Detailed Experimental Study](/publication/2018-07_what-your-dram-power-models-are-not-telling-you-lessons-detailed-experimental) Saugata Ghose, Abdullah Giray Yağlıkçı, Raghav Gupta, [Donghyuk Lee](/person/donghyuk-lee), Kais Kudrolli, William X. Liu, Hasan Hassan, Kevin K. Chang, [Niladrish Chatterjee](/person/niladrish-chatterjee), Aditya Agrawal, [Mike O'Connor](/person/mike-o-connor), Onur Mutlu [arXiv](https://arxiv.org/abs/1807.05102) [What Your DRAM Power Models Aren’t Telling You: Lessons from a Detailed Experimental Study](/publication/2018-06_what-your-dram-power-models-aren-t-telling-you-lessons-detailed-experimental) Saugata Ghose, Abdullah Giray Yağlıkçı, Raghav Gupta, [Donghyuk Lee](/person/donghyuk-lee), Kais Kudrolli, William X. Liu, Hasan Hassan, Kevin Chang, [Niladrish Chatterjee](/person/niladrish-chatterjee), Aditya Agrawal, [Mike O'Connor](/person/mike-o-connor), Onur Mutlu [ACM International Conference on Measurement and Analysis of Computer Systems (S…](https://dl.acm.org/doi/abs/10.1145/3224419) [Voltron: Understanding and Exploiting the Voltage-Latency-Reliability Trade-Offs in Modern DRAM Chips to Improve Energy Efficiency](/publication/2018-05_voltron-understanding-and-exploiting-voltage-latency-reliability-trade-offs) Kevin K. Chang, Abdullah Giray Yağlıkçı, Saugata Ghose, Aditya Agrawal, [Niladrish Chatterjee](/person/niladrish-chatterjee), Abhijith Kashyap, [Donghyuk Lee](/person/donghyuk-lee), [Mike O'Connor](/person/mike-o-connor), Hasan Hassan, Onur Mutlu [arXiv](https://arxiv.org/abs/1805.03175) [Compressing DMA Engine: Leveraging Activation Sparsity for Training Deep Neural Networks](/publication/2018-02_compressing-dma-engine-leveraging-activation-sparsity-training-deep-neural) Minsoo Rhu, [Mike O'Connor](/person/mike-o-connor), [Niladrish Chatterjee](/person/niladrish-chatterjee), Jeff Pool, Youngeun Kwon, [Steve Keckler](/person/stephen-keckler) [International Symposium on High Performance Computer Architecture (HPCA)](https://ieeexplore.ieee.org/document/8327000) [Reducing Data Transfer Energy by Exploiting Similarity within a Data Transaction](/publication/2018-02_reducing-data-transfer-energy-exploiting-similarity-within-data-transaction) [Donghyuk Lee](/person/donghyuk-lee), [Mike O'Connor](/person/mike-o-connor), [Niladrish Chatterjee](/person/niladrish-chatterjee) [International Symposium on High Performance Computer Architecture (HPCA)](https://ieeexplore.ieee.org/document/8326997) Best Paper nominee ### 2017 [Toward Standardized Near-Data Processing with Unrestricted Data Placement for GPUs](/publication/2017-11_toward-standardized-near-data-processing-unrestricted-data-placement-gpus) Gwangsun Kim, [Niladrish Chatterjee](/person/niladrish-chatterjee), [Mike O'Connor](/person/mike-o-connor), Kevin Hsieh [International Conference for High-Performance Computing, Networking, Storage, a…](https://dl.acm.org/citation.cfm?id=3126965) [Fine-Grained DRAM: Energy-Efficient DRAM for Extreme Bandwidth Systems](/publication/2017-10_fine-grained-dram-energy-efficient-dram-extreme-bandwidth-systems) [Mike O'Connor](/person/mike-o-connor), [Niladrish Chatterjee](/person/niladrish-chatterjee), [Donghyuk Lee](/person/donghyuk-lee), [John Wilson](/person/john-wilson), Aditya Agrawal, [Steve Keckler](/person/stephen-keckler), [William Dally](/person/william-dally) [International Symposium on Microarchitecture (MICRO)](https://dl.acm.org/citation.cfm?id=3124545) [Understanding Reduced-Voltage Operation in Modern DRAM Devices: Experimental Characterization, Analysis, and Mechanisms](/publication/2017-06_understanding-reduced-voltage-operation-modern-dram-devices-experimental) Kevin Chang, Abdullah Giray Yağlıkçı, Saugata Ghose, Aditya Agrawal, [Niladrish Chatterjee](/person/niladrish-chatterjee), Abhijith Kashyap, [Donghyuk Lee](/person/donghyuk-lee), [Mike O'Connor](/person/mike-o-connor), Hasan Hassan, Onur Mutlu [ACM Conference on Measurement and Analysis of Computer Systems (SIGMETRICS 2017)](http://dl.acm.org/citation.cfm?id=3078590) [Understanding Reduced-Voltage Operation in Modern DRAM Chips: Characterization, Analysis, and Mechanisms](/publication/2017-05_understanding-reduced-voltage-operation-modern-dram-chips-characterization) Kevin K. Chang, Abdullah Giray Yağlıkçı, Saugata Ghose, Aditya Agrawal, [Niladrish Chatterjee](/person/niladrish-chatterjee), Abhijith Kashyap, [Donghyuk Lee](/person/donghyuk-lee), [Mike O'Connor](/person/mike-o-connor), Hasan Hassan, Onur Mutlu [arXiv](https://arxiv.org/abs/1705.10292) [Compressing DMA Engine: Leveraging Activation Sparsity for Training Deep Neural Networks](/publication/2017-05_compressing-dma-engine-leveraging-activation-sparsity-training-deep-neural) Minsoo Rhu, [Mike O'Connor](/person/mike-o-connor), [Niladrish Chatterjee](/person/niladrish-chatterjee), Jeff Pool, [Stephen W. Keckler](/person/stephen-keckler) [arXiv](https://arxiv.org/abs/1705.01626) [Architecting an Energy-Efficient DRAM System for GPUs](/publication/2017-02_architecting-energy-efficient-dram-system-gpus) [Niladrish Chatterjee](/person/niladrish-chatterjee), [Mike O'Connor](/person/mike-o-connor), [Donghyuk Lee](/person/donghyuk-lee), Daniel Johnson, Minsoo Rhu, [Steve Keckler](/person/stephen-keckler), [William Dally](/person/william-dally) [International Symposium on High Performance Computer Architecture (HPCA)](http://ieeexplore.ieee.org/document/7920815/) ### 2016 [CLARA: Circular Linked-List Auto- and Self-Refresh Architecture](/publication/2016-10_clara-circular-linked-list-auto-and-self-refresh-architecture) Aditya Agrawal, [Mike O'Connor](/person/mike-o-connor), Evgeny Bolotin, [Niladrish Chatterjee](/person/niladrish-chatterjee), [Joel Emer](/person/joel-emer), [Steve Keckler](/person/stephen-keckler) [International Symposium on Memory Systems (MEMSYS'16)](https://dl.acm.org/doi/10.1145/2989081.2989084) [Transparent Offloading and Mapping (TOM): Enabling Programmer-Transparent Near-Data Processing in GPU Systems](/publication/2016-06_transparent-offloading-and-mapping-tom-enabling-programmer-transparent-near) Kevin Hsieh, Eiman Ebrahimi, Gwangsun Kim, [Niladrish Chatterjee](/person/niladrish-chatterjee), [Mike O'Connor](/person/mike-o-connor), Nandita Vijaykumar, Onur Mutlu, [Steve Keckler](/person/stephen-keckler) [International Symposium on Computer Architecture (ISCA)](http://ieeexplore.ieee.org/document/7551394/) ### 2015 [Exploiting Asymmetry in Booth-Encoded Multipliers for Reduced Energy Multiplication](/publication/2015-11_exploiting-asymmetry-booth-encoded-multipliers-reduced-energy-multiplication) [Mike O'Connor](/person/mike-o-connor), Earl Swartzlander, Jr. [49th Asilomar Conference on Signals, Systems, and Computers](http://ieeexplore.ieee.org/abstract/document/7421228/) [MemcachedGPU: Scaling-up Scale-out Key-value Stores](/publication/2015-08_memcachedgpu-scaling-scale-out-key-value-stores) Tayler Hetherington, [Mike O'Connor](/person/mike-o-connor), Tor Aamodt [Sixth ACM Symposium on Cloud Computing (SoCC '15)](http://dl.acm.org/citation.cfm?id=2806836) [Designing Efficient Heterogeneous Memory Architectures](/index.php/publication/2015-08_designing-efficient-heterogeneous-memory-architectures) Evgeny Bolotin, [David Nellans](/index.php/person/david-nellans), Oreste Villa, [Mike O'Connor](/index.php/person/mike-o-connor), Alex Ramirez, [Steve Keckler](/index.php/person/stephen-keckler), [Mike O'Connor](/index.php/person/mike-o-connor) [IEEE Micro](https://ieeexplore.ieee.org/document/7155441) [Designing Efficient Heterogeneous Memory Architectures](/index.php/publication/2015-08_designing-efficient-heterogeneous-memory-architectures) Evgeny Bolotin, [David Nellans](/index.php/person/david-nellans), Oreste Villa, [Mike O'Connor](/index.php/person/mike-o-connor), Alex Ramirez, [Steve Keckler](/index.php/person/stephen-keckler), [Mike O'Connor](/index.php/person/mike-o-connor) [IEEE Micro](https://ieeexplore.ieee.org/document/7155441) [A Variable Warp Size Architecture](/publication/2015-06_variable-warp-size-architecture) Timothy Rogers, Daniel Johnson, [Mike O'Connor](/person/mike-o-connor), [Steve Keckler](/person/stephen-keckler) [International Symposium on Computer Architecture (ISCA)](https://dl.acm.org/doi/10.1145/2749469.2750410) [Flexible Software Profiling of GPU Architectures](/publication/2015-06_flexible-software-profiling-gpu-architectures) [Mark Stephenson](/person/mark-stephenson), [Siva Hari](/person/siva-hari), Yunsup Lee, Eiman Ebrahimi, Daniel Johnson, [David Nellans](/person/david-nellans), [Mike O'Connor](/person/mike-o-connor), [Steve Keckler](/person/stephen-keckler) [International Symposium on Computer Architecture (ISCA)](https://dl.acm.org/doi/10.1145/2749469.2750375) [Toggle-aware Compression for GPUs](/publication/2015-05_toggle-aware-compression-gpus) Gennady Pekhimenko, Evgeny Bolotin, [Mike O'Connor](/person/mike-o-connor), Onur Mutlu, Todd C. Mowry, [Steve Keckler](/person/stephen-keckler) [IEEE Computer Architecture Letters ( Volume: 14, Issue: 2, July-Dec. 1 2015 )](http://ieeexplore.ieee.org/document/7103282/) [Page Placement Strategies for GPUs within Heterogeneous Memory Systems](/publication/2015-03_page-placement-strategies-gpus-within-heterogeneous-memory-systems) Neha Agarwal, [David Nellans](/person/david-nellans), [Mark Stephenson](/person/mark-stephenson), [Mike O'Connor](/person/mike-o-connor), [Steve Keckler](/person/stephen-keckler) [International Conference on Architectural Support for Programming Languages and…](http://dl.acm.org/citation.cfm?id=2694381) [Priority-Based Cache Allocation in Throughput Processors](/publication/2015-02_priority-based-cache-allocation-throughput-processors) Dong Li, Minsoo Rhu, Daniel Johnson, [Mike O'Connor](/person/mike-o-connor), Mattan Erez, Donald Fussell, [Steve Keckler](/person/stephen-keckler) [International Symposium on High Performance Computer Architecture (HPCA)](http://ieeexplore.ieee.org/document/7056024/) [Unlocking Bandwidth for GPUs in CC-NUMA systems](/publication/2015-02_unlocking-bandwidth-gpus-cc-numa-systems) Neha Agarwal, [David Nellans](/person/david-nellans), [Mike O'Connor](/person/mike-o-connor), [Steve Keckler](/person/stephen-keckler), Thomas Wenisch [International Symposium on High Performance Computer Architecture (HPCA)](http://ieeexplore.ieee.org/document/7056046/) ### 2014 [Scaling the Power Wall: A Path to Exascale](/publication/2014-11_scaling-power-wall-path-exascale) Oreste Villa, Daniel Johnson, [Mike O'Connor](/person/mike-o-connor), Evgeny Bolotin, [David Nellans](/person/david-nellans), Justin Luitjens, Nikolai Sakharnykh, Peng Wang, Paulius Micikevicius, Anthony Scudiero, [Steve Keckler](/person/stephen-keckler), [William Dally](/person/william-dally) [SC '14](http://ieeexplore.ieee.org/abstract/document/7013055/)