  Walker Turner  

 



  ![](/sites/default/files/person/Turner-Image%20-%20Copy.jpg)

  

 Walker Turner is a Senior Research Scientist in the Circuits Research Group at NVIDIA, Durham, North Carolina. He received the B.S., M.S., and Ph.D. degrees in Electrical Engineering from the University of Florida in 2009, 2012, and 2015, respectively. His research interests include low-power integrated circuit design for mixed-signal and high-speed signaling applications for on- and off-chip communication. Walker is also a Teaching, Assistant Professor at North Carolina State University where he instructs an undergraduate microelectronics engineering course.



   Main Field of Interest

[Circuits and VLSI Design](/research-area/circuits)

 

  

 

 

 



 ### Publications

 

### 2024 

[A 0.190-pJ/bit 25.2-Gb/s/wire Inverter-Based AC-Coupled Transceiver for Short-Reach Die-to-Die Interfaces in 5-nm CMOS](/publication/2024-04_0190-pjbit-252-gbswire-inverter-based-ac-coupled-transceiver-short-reach-die)

[Yoshinori Nishi](/person/yoshi-nishi), John W. Poulton, [Xi Chen](/person/xi-chen), [Sanquan Song](/person/sanquan-song), [Brian Zimmer](/person/brian-zimmer), [Walker Turner](/person/walker-turner), [Stephen Tell](/person/stephen-tell), [Nikola Nedovic](/person/nikola-nedovic), [John Wilson](/person/john-wilson), [William Dally](/person/william-dally), [Tom Gray](/person/tom-gray)



[IEEE Journal of Solid-State Circuits (JSSC) (Volume: 59, Issue: 4, April 2024)](https://ieeexplore.ieee.org/document/10185334)









### 2023 

[ChipNeMo: Domain-Adapted LLMs for Chip Design](/index.php/publication/2023-10_chipnemo-domain-adapted-llms-chip-design)

[Mingjie Liu](/index.php/person/mingjie-liu), Teo Ene, Robert Kirby, Chris Cheng, [Nathaniel Pinckney](/index.php/person/nathaniel-pinckney), [Rongjian Liang](/index.php/person/rongjian-liang), Jonah Alben, Himyanshu Anand, Sanmitra Banerjee, Ismet Bayraktaroglu, Bonita Bhaskaran, Bryan Catanzaro, Arjun Chaudhuri, Sharon Clay, Bill Dally, Laura Dang, Parikshit Deshpande, Siddhanth Dhodhi, Sameer Halepete, Eric Hill, Jiashang Hu, Sumit Jain, [Brucek Khailany](/index.php/person/brucek-khailany), George Kokai, Kishor Kunal, Xiaowei Li, Charley Lind, Hao Liu, Stuart Oberman, Sujeet Omar, Sreedhar Pratty, Jonathan Raman, Ambar Sarkar, Zhengjiang Shao, Hanfei Sun, Pratik P Suthar, Varun Tej, [Walker Turner](/index.php/person/walker-turner), Kaizhe Xu, Mark Haoxing Ren













[A 0.190-pJ/bit 25.2-Gb/s/wire Inverter-Based AC-Coupled Transceiver for Short-Reach Die-to-Die Interfaces in 5-nm CMOS](/publication/2023-06_0190-pjbit-252-gbswire-inverter-based-ac-coupled-transceiver-short-reach-die)

[Yoshinori Nishi](/person/yoshi-nishi), John W. Poulton, [Xi Chen](/person/xi-chen), [Sanquan Song](/person/sanquan-song), [Brian Zimmer](/person/brian-zimmer), [Walker Turner](/person/walker-turner), [Stephen Tell](/person/stephen-tell), [Nikola Nedovic](/person/nikola-nedovic), [John Wilson](/person/john-wilson), [William Dally](/person/william-dally), [Tom Gray](/person/tom-gray)



[2023 IEEE SYMPOSIUM ON VLSI TECHNOLOGY &amp; CIRCUITS](https://ieeexplore.ieee.org/abstract/document/10185334)









[A 0.297-pJ/Bit 50.4-Gb/s/Wire Inverter-Based Short-Reach Simultaneous Bi-Directional Transceiver for Die-to-Die Interface in 5-nm CMOS](/publication/2023-04_0297-pjbit-504-gbswire-inverter-based-short-reach-simultaneous-bi-directional)

[Yoshinori Nishi](/person/yoshi-nishi), John W. Poulton, [Walker Turner](/person/walker-turner), [Xi Chen](/person/xi-chen), [Sanquan Song](/person/sanquan-song), [Brian Zimmer](/person/brian-zimmer), [Stephen Tell](/person/stephen-tell), [Nikola Nedovic](/person/nikola-nedovic), [John Wilson](/person/john-wilson), [William Dally](/person/william-dally), [Tom Gray](/person/tom-gray)



[IEEE Journal of Solid-State Circuits ( Volume: 58, Issue: 4, April 2023)](https://ieeexplore.ieee.org/document/10011563)









[Reinforcement Learning Guided Detailed Routing for Custom Circuits](/index.php/publication/2023-03_reinforcement-learning-guided-detailed-routing-custom-circuits)

Hao Chen, Kai-Chieh Hsu, [Walker Turner](/index.php/person/walker-turner), Po-Hsuan Wei, Keren Zhu, David Z. Pan, Mark Haoxing Ren



[International Symposium on Physical Design 2023](https://ispd.cc/ispd2023/index.php)









### 2022 

[TAG: Learning Circuit Spatial Embedding from Layouts](/index.php/publication/2022-10_tag-learning-circuit-spatial-embedding-layouts)

Keren Zhu, Hao Chen, [Walker Turner](/index.php/person/walker-turner), George F. Kokai, Po-Hsuan Wei, David Z. Pan, Mark Haoxing Ren



[2022 International Conference on Computer-Aided Design](https://iccad.com)









[A 0.297-pJ/bit 50.4-Gb/s/wire Inverter-Based Short-Reach Simultaneous Bidirectional Transceiver for Die-to-Die Interface in 5nm CMOS](/publication/2022-06_0297-pjbit-504-gbswire-inverter-based-short-reach-simultaneous-bidirectional)

[Yoshinori Nishi](/person/yoshi-nishi), John W. Poulton, [Xi Chen](/person/xi-chen), [Sanquan Song](/person/sanquan-song), [Brian Zimmer](/person/brian-zimmer), [Walker Turner](/person/walker-turner), [Stephen Tell](/person/stephen-tell), [Nikola Nedovic](/person/nikola-nedovic), [John Wilson](/person/john-wilson), [William Dally](/person/william-dally), [Tom Gray](/person/tom-gray)



[2022 IEEE SYMPOSIUM ON VLSI TECHNOLOGY &amp; CIRCUITS](https://archive.vlsisymposium.org/22web/about/)









[AutoCRAFT: Layout Automation for Custom Circuits in Advanced FinFET Technologies](/publication/2022-03_autocraft-layout-automation-custom-circuits-advanced-finfet-technologies)

Hao Chen, [Walker Turner](/person/walker-turner), [Sanquan Song](/person/sanquan-song), Keren Zhu, George Kokai, [Brian Zimmer](/person/brian-zimmer), [Tom Gray](/person/tom-gray), [Brucek Khailany](/person/brucek-khailany), Mark Haoxing Ren



[International Symposium on Physical Design 2022](https://ispd.cc/ispd2022/slides/ispd2022.html)









[Routability-Aware Placement for Advanced FinFET Analog Circuits with Satisfiability Modulo Theories](/publication/2022-03_routability-aware-placement-advanced-finfet-analog-circuits-satisfiability)

Hao Chen, [Walker Turner](/person/walker-turner), David Z. Pan, Mark Haoxing Ren



[Design, Automation &amp; Test in Europe 2022](https://www.date-conference.com/)









### 2021 

[Parasitic-Aware Analog Circuit Sizing with Graph Neural Networks and Bayesian Optimization](/publication/2021-02_parasitic-aware-analog-circuit-sizing-graph-neural-networks-and-bayesian)

Mingjie Liu, [Walker Turner](/person/walker-turner), George Kokai, David Z. Pan, [Brucek Khailany](/person/brucek-khailany), Mark Haoxing Ren



[2021 Design, Automation &amp; Test in Europe Conference &amp; Exhibition (DATE)](https://www.date-conference.com/)









### 2020 

[ParaGraph: Layout Parasitics and Device Parameter Prediction using Graph Neural Networks](/publication/2020-07_paragraph-layout-parasitics-and-device-parameter-prediction-using-graph-neural)

Mark Haoxing Ren, George Kokai, [Walker Turner](/person/walker-turner), Ting-Sheng Ku



[Design Automation Conference (DAC) 2020](https://www.dac.com/)









[Reference-Noise Compensation Scheme for Single- Ended Package-to-Package Links](/publication/2020-02_reference-noise-compensation-scheme-single-ended-package-package-links)

[Xi Chen](/person/xi-chen), [Nikola Nedovic](/person/nikola-nedovic), [Stephen Tell](/person/stephen-tell), [Sudhir Kudva](/person/sudhir-kudva), [Brian Zimmer](/person/brian-zimmer), [Trey Greer](/person/trey-greer), John Poulton, [Sanquan Song](/person/sanquan-song), [Walker Turner](/person/walker-turner), [John Wilson](/person/john-wilson), [Tom Gray](/person/tom-gray)



[2020 International Solid-State Circuits Conference](http://isscc.org/)









### 2019 

[A 1.17-pJ/b, 25-Gb/s/pin Ground-Referenced Single-Ended Serial Link for Off- and On-Package Communication Using a Process- and Temperature-Adaptive Voltage Regulator](/publication/2019-01_117-pjb-25-gbspin-ground-referenced-single-ended-serial-link-and-package)

John Poulton, [John Wilson](/person/john-wilson), [Walker Turner](/person/walker-turner), [Brian Zimmer](/person/brian-zimmer), [Xi Chen](/person/xi-chen), [Sudhir Kudva](/person/sudhir-kudva), [Sanquan Song](/person/sanquan-song), [Stephen Tell](/person/stephen-tell), [Nikola Nedovic](/person/nikola-nedovic), Wenxu Zhao, Sunil Sudhakaran, [Tom Gray](/person/tom-gray), [William Dally](/person/william-dally)



IEEE JOURNAL OF SOLID-STATE CIRCUITS









### 2018 

[Ground-Referenced Signaling for Intra-Chip and Short-Reach Chip-to-Chip Interconnects](/publication/2018-04_ground-referenced-signaling-intra-chip-and-short-reach-chip-chip-interconnects)

[Walker Turner](/person/walker-turner), John Poulton, [John Wilson](/person/john-wilson), [Xi Chen](/person/xi-chen), [Stephen Tell](/person/stephen-tell), [Matt Fojtik](/person/matt-fojtik), [Trey Greer](/person/trey-greer), [Brian Zimmer](/person/brian-zimmer), [Sanquan Song](/person/sanquan-song), [Nikola Nedovic](/person/nikola-nedovic), [Sudhir Kudva](/person/sudhir-kudva), Sunil Sudhakaran, Rizwan Bashirullah, Wenxu Zhao, [William Dally](/person/william-dally), [Tom Gray](/person/tom-gray)



Custom Integrated Circuits Conference









[A 1.17pJ/b 25Gb/s/pin Ground-Referenced Single Ended Serial Link for Off- and On-Package Communication in 16nm CMOS Using a Process- and Temperature-Adaptive Voltage Regulator](/publication/2018-02_117pjb-25gbspin-ground-referenced-single-ended-serial-link-and-package)

[John Wilson](/person/john-wilson), [Walker Turner](/person/walker-turner), John Poulton, [Brian Zimmer](/person/brian-zimmer), [Xi Chen](/person/xi-chen), [Sanquan Song](/person/sanquan-song), [Stephen Tell](/person/stephen-tell), [Nikola Nedovic](/person/nikola-nedovic), Wenxu Zhao, Sunil Sudhakaran, [Tom Gray](/person/tom-gray), [William Dally](/person/william-dally)



ISSCC