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2. Exploiting Asymmetry in Booth-Encoded Multipliers for Reduced Energy Multiplication
 
 # Exploiting Asymmetry in Booth-Encoded Multipliers for Reduced Energy Multiplication

  ![](/sites/default/files/styles/wide/public/publications/oconnor.asilomar2016.png?itok=XH8PM0-j)

 Booth Encoding is a common technique utilized in the design of high-speed multipliers. These multipliers typically encode just one operand of the multiplier, and this asymmetry results in different power characteristics as each input transitions to the next value in a pipelined design. Relative to the non-encoded input, changes on the Booth-encoded input induce more signal transitions requiring ~73% more multiplier array energy. This paper proposes low-overhead approaches to take advantage of this asymmetric behavior to reduce the energy of multiplication operations in pipelined SIMD architectures like GPUs. Compiler-based approaches that apply constant or uniform inputs to the Booth-encoded input of the multiplier can save 4.8% of multiplier energy on average. An additional 1.5% savings can be achieved with dynamic detection and steering of uniform inputs.



 ## Authors



[Mike O'Connor](/person/mike-o-connor)

Earl Swartzlander, Jr. (The University of Texas at Austin)

 

 

 ## Publication Date



Sunday, November 8, 2015

 

 ## Published in



[49th Asilomar Conference on Signals, Systems, and Computers](http://ieeexplore.ieee.org/abstract/document/7421228/)

 

 ## Research Area



[Computer Architecture](/research-area/computer-architecture)

 

 

 ## External Links



[IEEE Digital Library](http://ieeexplore.ieee.org/abstract/document/7421228/)

 

 

 ## Uploaded Files



[Published manuscript](https://research.nvidia.com/sites/default/files/pubs/2015-11_Exploiting-Asymmetry-in//oconnor.asilomar2015.pdf "Open file in new window")749.53 KB

 

 

 ## Copyright



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