1. [Publications](/publications)
2. Security Verification through Automatic Hardware-Aware Exploit Synthesis: The CheckMate Approach.
 
 # Security Verification through Automatic Hardware-Aware Exploit Synthesis: The CheckMate Approach.

  ![Publication image](/sites/default/files/styles/wide/public/default_images/default.jpeg?itok=qUFsuJCP "Publication image")

 Many hardware security exploits result from the combination of well-known attack classes with newly exploited hardware features. CheckMate is an approach and automated tool for evaluating microarchitectural susceptibility to specified attack classes, and for synthesizing proof-of-concept exploit code for susceptible designs.



 ## Authors



Caroline Trippel (Princeton)

[Daniel Lustig](/person/daniel-lustig)

Margaret Martonosi (Princeton)

 

 

 ## Publication Date



Thursday, April 11, 2019

 

 ## Published in



[IEEE Micro (Issue: Top Picks of the 2018 Computer Architecture Conferences)](https://ieeexplore.ieee.org/document/8686197)

 

 ## Research Area



[Computer Architecture](/research-area/computer-architecture)

 

 

 ## External Links



[IEEE Digital Library](https://ieeexplore.ieee.org/document/8686197)

 

 

 ## Copyright



This material is posted here with permission of the IEEE. Internal or personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution must be obtained from the IEEE by writing to <pubs-permissions@ieee.org>.