1. [Publications](/publications) 2. Accelergy: An Architecture-Level Energy Estimation Methodology for Accelerator Designs # Accelergy: An Architecture-Level Energy Estimation Methodology for Accelerator Designs ![Publication image](/sites/default/files/styles/wide/public/default_images/default.jpeg?itok=qUFsuJCP "Publication image") With Moore’s law slowing down and Dennard scaling ended, energy-efficient domain-specific accelerators, such as deep neural network (DNN) processors for machine learning and programmable network switches for cloud applications, have become a promising way for hardware designers to continue bringing energy efficiency improvements to data and computation-intensive applications. To ensure the fast exploration of the accelerator design space, architecture-level energy estimators, which perform energy estimations without requiring complete hardware description of the designs, are critical to designers. However, it is difficult to use existing architecture-level energy estimators to obtain accurate estimates for accelerator designs, as accelerator designs are diverse and sensitive to data patterns. This paper presents Accelergy, a generally applicable energy estimation methodology for accelerators that allows design specifications comprised of user-defined high-level compound components and user-defined low-level primitive components, which can be characterized by third-party energy estimation plug-ins. An example with primitive and compound components for DNN accelerator designs is also provided as an application of the proposed methodology. Overall, Accelergy achieves 95% accuracy on Eyeriss, a well-known DNN accelerator design, and can correctly capture the energy breakdown of components at different granularities. The Accelergy code is available at . ## Authors Yannan Nellie Wu (MIT) [Joel Emer](/person/joel-emer) Vivienne Sze (MIT) ## Publication Date Friday, November 1, 2019 ## Published in [International Conference on Computer Aided Design (ICCAD)](https://ieeexplore.ieee.org/document/8942149) ## Research Area [Computer Architecture](/research-area/computer-architecture) ## External Links [IEEE Digital Library](https://ieeexplore.ieee.org/document/8942149?arnumber=8942149&tag=1) ## Uploaded Files [Published manuscript](https://d1qx31qr3h6wln.cloudfront.net/publications/ICCAD_2019_Accelergy.pdf "Open file in new window")1.61 MB ## Copyright This material is posted here with permission of the IEEE. Internal or personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution must be obtained from the IEEE by writing to .