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2. MAGNet: A Modular Accelerator Generator for Neural Networks
 
 # MAGNet: A Modular Accelerator Generator for Neural Networks

  ![](/sites/default/files/styles/wide/public/publications/magnet_thumb.png?itok=5FfszZWz)

 Deep neural networks have been adopted in a wide range of application domains, leading to high demand for inference accelerators. However, the high cost associated with ASIC hardware design makes it challenging to build custom accelerators for different targets. To lower design cost, we propose MAGNet, a modular accelerator generator for neural networks. MAGNet takes a target application consisting of one or more neural networks along with hardware constraints as input and produces synthesizable RTL for a neural network accelerator ASIC as well as valid mappings for running the target networks on the generated hardware. MAGNet consists of three key components: (i) MAGNet Designer, a highly configurable architectural template designed in C++ and synthesizable by high-level synthesis tools. MAGNet Designer supports a wide range of design-time parameters such as different data formats, diverse memory hierarchies, and dataflows. (ii) MAGNet Mapper, an automated framework for exploring different software mappings for executing a neural network on the generated hardware. (iii) MAGNet Tuner, a design space exploration framework encompassing the designer, the mapper, and a deep learning framework to enable fast design space exploration and co-optimization of architecture and application. We demonstrate the utility of MAGNet by designing an inference accelerator optimized for image classification application using three different neural networks—AlexNet, ResNet, and DriveNet. MAGNet-generated hardware is highly efficient and leverages a novel multi-level dataflow to achieve 40 fJ/op and 2.8 TOPS/mm^2 in a 16nm technology node for the ResNet-50 benchmark with &lt;1% accuracy loss on the ImageNet dataset.



 ## Authors



[Rangharajan Venkatesan](/person/rangharajan-venkatesan)

Sophia Shao (NVIDIA)

Miaorong Wang (Massachusetts Institute of Technology)

[Jason Clemons](/person/jason-clemons)

[Steve Dai](/person/steve-dai)

[Matt Fojtik](/person/matt-fojtik)

[Ben Keller](/person/ben-keller)

Alicia Klinefelter (NVIDIA)

[Nathaniel Pinckney](/person/nathaniel-pinckney)

Priyanka Raina (Stanford University)

[Yanqing Zhang](/person/yanqing-zhang)

[Brian Zimmer](/person/brian-zimmer)

[William Dally](/person/william-dally)

[Joel Emer](/person/joel-emer)

[Steve Keckler](/person/stephen-keckler)

[Brucek Khailany](/person/brucek-khailany)

 

 

 ## Publication Date



Monday, November 4, 2019

 

 ## Published in



[International Conference On Computer Aided Design (ICCAD)](https://ieeexplore.ieee.org/document/8942127)

 

 ## Research Area



[Artificial Intelligence and Machine Learning ](/research-area/machine-learning-artificial-intelligence)

[Circuits and VLSI Design](/research-area/circuits)

[Computer Architecture](/research-area/computer-architecture)

 

 

 ## External Links



[IEEE Digital Library](https://ieeexplore.ieee.org/document/8942127)

 

 

 ## Uploaded Files



[Published manuscript](https://research.nvidia.com/sites/default/files/pubs/2019-11_MAGNet%3A-A-Modular//magnet_paper.pdf "Open file in new window")4.8 MB

 

 

 ## Copyright



This material is posted here with permission of the IEEE. Internal or personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution must be obtained from the IEEE by writing to <pubs-permissions@ieee.org>.