1. [Publications](/publications) 2. NVCell: Standard Cell Layout in Advanced Technology Nodes with Reinforcement Learning # NVCell: Standard Cell Layout in Advanced Technology Nodes with Reinforcement Learning ![](/sites/default/files/publications/RL_DRC_Fixing.gif) High quality standard cell layout automation in advanced technology nodes is still challenging in the industry today because of complex design rules. In this paper we introduce an automatic standard cell layout generator called **NVCell** that can generate layouts with equal or smaller area for over 90% of single row cells in an industry standard cell library on an advanced technology node. **NVCell** leverages reinforcement learning (RL) to fix design rule violations during routing and to generate efficient placements. ## Authors Mark Haoxing Ren (NVIDIA) [Matt Fojtik](/person/matt-fojtik) [Brucek Khailany](/person/brucek-khailany) ## Publication Date Sunday, December 5, 2021 ## Published in Design Automation Conference (DAC) 2021 (Invited special session paper) ## Research Area [Artificial Intelligence and Machine Learning ](/research-area/machine-learning-artificial-intelligence) [Circuits and VLSI Design](/research-area/circuits) ## Uploaded Files [NVCell\_preprint.pdf](https://d1qx31qr3h6wln.cloudfront.net/publications/NVCell_preprint.pdf "Open file in new window")628.92 KB ## Copyright This material is posted here with permission of the IEEE. Internal or personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution must be obtained from the IEEE by writing to .