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2. DRC-Coder: Automated DRC Checker Code Generation Using LLM Autonomous Agent
 
 # DRC-Coder: Automated DRC Checker Code Generation Using LLM Autonomous Agent

  ![](/sites/default/files/styles/wide/public/publications/DRCCoder.png?itok=CW3FkTSy)

 In the advanced technology nodes, the integrated design rule checker (DRC) is often utilized in place and route tools for fast optimization loops for power-performance-area. Implementing integrated DRC checkers to meet the standard of commercial DRC tools demands extensive human expertise to interpret foundry specifications, analyze layouts, and debug code iteratively. However, this labor-intensive process, requiring to be repeated by every update of technology nodes, prolongs the turnaround time of designing circuits. In this paper, we present DRC-Coder, a multi-agent framework with vision capabilities for automated DRC code generation. By incorporating vision language models and large language models (LLM), DRC-Coder can effectively process textual, visual, and layout information to perform rule interpretation and coding by two specialized LLMs. We also design an auto-evaluation function for LLMs to enable DRC code debugging. Experimental results show that targeting on a sub-3nm technology node for a state-of-the-art standard cell layout tool, DRC-Coder achieves perfect F1 score 1.000 in generating DRC codes for meeting the standard of a commercial DRC tool, highly outperforming standard prompting techniques (F1=0.631). DRC-Coder can generate code for each design rule within four minutes on average, which significantly accelerates technology advancement and reduces engineering costs.



 ## Authors



Chen-Chia Chang (NVIDIA)

[Chia-Tung (Mark) Ho](/index.php/person/chia-tung-mark-ho)

Yaguang Li (NVIDIA)

Yiran Chen (Duke University)

Mark Haoxing Ren (NVIDIA)

 

 

 ## Publication Date



Thursday, November 28, 2024

 

 ## Published in



[arXiv](https://arxiv.org/abs/2412.05311)

 

 ## Research Area



[Artificial Intelligence and Machine Learning ](/index.php/research-area/machine-learning-artificial-intelligence)

[Circuits and VLSI Design](/index.php/research-area/circuits)

[Generative AI](/index.php/research-area/generative-ai)

 

 

 ## Uploaded Files



[ArXiv paper preview](https://d1qx31qr3h6wln.cloudfront.net/publications/2412.05311v1.pdf "Open file in new window")1.98 MB