|Brucek Khailany, Ph.D.
Senior Research Manager
Brucek Khailany joined NVIDIA in 2009 and currently leads the ASIC & VLSI Research group. During his time at NVIDIA, he has contributed to projects within research and product groups on topics spanning computer architecture, unit micro-architecture, and ASIC and VLSI design techniques. Previously, Dr. Khailany was a Co-Founder and Principal Architect at Stream Processors, Inc. (SPI) where he led research and development activities related to highly-parallel programmable processor architectures. At SPI, he helped lead the development of the industry's first commercially-available stream processor architecture targeting signal and image processing applications. From 1997-2003, at Stanford University, he led the silicon implementation of the Imagine stream processor, a research chip that introduced the concepts of stream processing and efficient partitioned register organizations. He received his Ph.D. and Masters in Electrical Engineering from Stanford University and received B.S.E. degrees in Electrical Engineering and Computer Engineering from the University of Michigan.
|Research Interests: |
ASIC and VLSI Design Methodology, Energy-efficient Architectures and Circuits, Computer Arithmetic
A Real-time Energy-Efficient Superpixel Hardware Accelerator for Mobile Computer Vision Applications|
Modeling and Analysis of Power Supply Noise Tolerance with Fine-grained GALS Adaptive Clocks
A Pausible Bisynchronous FIFO for GALS Systems
Unifying Primary Cache, Scratch, and Register File Memories in a Throughput Processor
CudaDMA: Optimizing GPU Memory Bandwidth via Warp Specialization
GPUs and the Future of Parallel Computing
A Programmable 512 GOPS Stream Processor for Signal, Image, and Video Processing
Imagine: Media Processing with Streams