|Michael Sullivan, Ph.D.
I am from the Washington D.C. area and received a bachelor's and master's degree from George Mason University. Most recently I got a PhD from the University of Texas at Austin under the tutelage of Mattan Erez and Earl E. Swartzlander, Jr.
|Research Interests: |
I am primarily interested in reliability research, and am currently investigating reliability mechanisms for on-chip sequential elements. My previous work has looked at better schemes for system-level state preservation and restoration, efficient organizations for DRAM memory protection, and strong-yet-efficient arithmetic error detection mechanisms. Please see here for a complete list of my papers, including those published before I joined NVIDIA research.
An Analytical Model for Hardened Latch Selection and Exploration|
Bit-Plane Compression: Transforming Data for Better Compression in Many-core Architectures
All-Inclusive ECC: Thorough End-to-End Protection for Reliable Computer Memory
Frugal ECC: Efficient and Versatile Memory Error Protection through Fine-Grained Compression