|Sudhir S. Kudva, Ph.D.
Sudhir S. Kudva received the Bachelor of Engineering degree (B.E.) in Electronics and Communcation Engineering from National Institute of Technology Karnataka, Suratkal, in 2004 Master of Engineering degree (M.E.) in Microelectronics from Indian Institute of Science, Bangalore, in 2006 and PhD from University of Minnesota, Twin Cities, in 2013. From 2006 -2008 he worked as Design Engineer at the AMD India Engineering Centre, Bangalore designing ROMs in 65nm and 45nm SOI technology. In summer of 2011 and fall of 2012, he interned at Intel corporation. He joined circuit research group of Nvidia research in April 2013.
|Research Interests: |
His research interests include high efficiency converters, fully integrated converters and power delivery network design.
Modeling and Analysis of Power Supply Noise Tolerance with Fine-grained GALS Adaptive Clocks|