Research

Designing Efficient Sorting Algorithms for Manycore GPUs

"Designing Efficient Sorting Algorithms for Manycore GPUs"
Nadathur Satish (UC Berkeley), Mark Harris (NVIDIA), Michael Garland (NVIDIA), in Proc. IEEE International Symposium on Parallel & Distributed Processing, May 2009
Research Area: Algorithms & Numerical Techniques
Author(s): Nadathur Satish (UC Berkeley), Mark Harris (NVIDIA), Michael Garland (NVIDIA)
Date: May 2009
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Abstract:

We describe the design of high-performance parallel radix sort and merge sort routines for manycore GPUs, taking advantage of the full programmability offered by CUDA. Our radix sort is the fastest GPU sort and our merge sort is the fastest comparison-based sort reported in the literature. Our radix sort is up to 4 times faster than the graphics-based GPUSort and greater than 2 times faster than other CUDA-based radix sorts. It is also 23% faster, on average, than even a very carefully optimized multicore CPU sorting routine.

To achieve this performance, we carefully design our algorithms to expose substantial fine-grained parallelism and decompose the computation into independent tasks that perform minimal global communication. We exploit the high-speed on-chip shared memory provided by NVIDIA’s GPU architecture and efficient data-parallel primitives, particularly parallel scan. While targeted at GPUs, these algorithms should also be well-suited for other manycore processors.