Publications

Our publications provide insight into some of our leading-edge research.

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2019

Near-Memory Data Transformation for Efficient Sparse Matrix Multi-Vector Multiplication
Daichi Fujiki, Niladrish Chatterjee, Donghyuk Lee, Mike O'Connor
MAGNet: A Modular Accelerator Generator for Neural Networks
Rangharajan Venkatesan, Sophia Shao, Miaorong Wang, Jason Clemons, Steve Dai, Matt Fojtik, Ben Keller, Alicia Klinefelter, Nathaniel Pinckney, Priyanka Raina, Yanqing Zhang, Brian Zimmer, William Dally, Joel Emer, Steve Keckler, Brucek Khailany
Accelergy: An Architecture-Level Energy Estimation Methodology for Accelerator Designs
Yannan Nellie Wu, Joel Emer, Vivienne Sze
NVBit: A Dynamic Binary Instrumentation Framework for NVIDIA GPUs
Oreste Villa, Mark Stephenson, David Nellans, Steve Keckler
Understanding Reuse, Performance, and Hardware Cost of DNN Dataflows: A Data-Centric Approach.
Hyoukjun Kwon, Prasanth Chatarasi, Michael Pellauer, Angshuman Parashar, Vivek Sarkar, Tushar Krishna
IEEE Micro Top Picks in Computer Architecture
ExTensor: An Accelerator for Sparse Tensor Algebra
Kartik Hegde, Hadi Asghari-Moghaddam, Michael Pellauer, Neal Crago, Aamer Jaleel, Edgar Solomonik, Joel Emer, Christopher W. Fletcher
IEEE Micro Top Picks in Computer Architecture (Honorable Mention)
Simba: Scaling Deep-Learning Inference with Multi-Chip-Module-Based Architecture
Sophia Shao, Jason Clemons, Rangharajan Venkatesan, Brian Zimmer, Matt Fojtik, Ted Jiang, Ben Keller, Alicia Klinefelter, Nathaniel Pinckney, Priyanka Raina, Stephen Tell, Yanqing Zhang, William Dally, Joel Emer, Tom Gray, Brucek Khailany, Steve Keckler
Best Paper award
IEEE Micro Top Picks in Computer Architecture (Honorable Mention)
A 0.11 pJ/Op, 0.32-128 TOPS, Scalable Multi-Chip-Module-based Deep Neural Network Accelerator Designed with a High-Productivity VLSI Methodology
Rangharajan Venkatesan, Sophia Shao, Brian Zimmer, Jason Clemons, Matt Fojtik, Ted Jiang, Ben Keller, Alicia Klinefelter, Nathaniel Pinckney, Priyanka Raina, Stephen Tell, Yanqing Zhang, William Dally, Joel Emer, Tom Gray, Steve Keckler, Brucek Khailany
Optimizing Multi-GPU Parallelization Strategies for Deep Learning Training
Saptadeep Pal, Eiman Ebrahimi, Arslan Zulfiqar, Yaosheng Fu, Victor Zhang, Szymon Migacz, David Nellans, Puneet Gupta
Optimizing Multi-GPU Parallelization Strategies for Deep Learning Training
Saptadeep Pal, Eiman Ebrahimi, Arslan Zulfiqar, Yaosheng Fu, Victor Zhang, Szymon Migacz, David Nellans, Puneet Gupta
GPU Snapshot: Checkpoint Offloading for GPU-Dense Systems
Kyushick Lee, Michael B. Sullivan, Siva Hari, Timothy Tsai, Steve Keckler, Mattan Erez
On the Trend of Resilience for GPU-Dense Systems
Kyushick Lee, Michael B. Sullivan, Siva Hari, Timothy Tsai, Steve Keckler, Mattan Erez
Best of SELSE (Workshop on Silicon Errors in Logic - System Effects)
Translation Ranger: Operating System Support for Contiguity-Aware TLBs
Zi Yan, Daniel Lustig, David Nellans, Abhishek Bhattacharjee
Adaptive Memory-Side Last-Level GPU Caching
Xia Zhao, Almutaz Adileh, Zhibin Yu, Zhiying Wang, Aamer Jaleel, Lieven Eeckhout
SNAP: A 1.67 – 21.55 TOPS/W Sparse Neural Acceleration Processor for Unstructured Sparse Deep Neural Network Inference in 16nm CMOS
Jie-Fang Zhang, Ching-En Lee, Chester Liu, Yakun Sophia Shao, Steve Keckler, Zhengya Zhang
Buddy Compression: Enabling Larger Memory for Deep Learning and HPC Workloads on GPUs
Esha Choukse, Michael B. Sullivan, Mike O'Connor, Mattan Erez, Jeff Pool, David Nellans, Stephen W. Keckler
Security Verification through Automatic Hardware-Aware Exploit Synthesis: The CheckMate Approach.
Caroline Trippel, Daniel Lustig, Margaret Martonosi
Nimble Page Management for Tiered Memory Systems
Zi Yan, Daniel Lustig, David Nellans, Abhishek Bhattacharjee
A Formal Analysis of the NVIDIA PTX Memory Consistency Model.
Daniel Lustig, Sameer Sahasrabuddhe, Olivier Giroux
IEEE Micro Top Picks in Computer Architecture (Honorable Mention)
Buffets: An Efficient and Composable Storage Idiom for Explicit Decoupled Data Orchestration
Michael Pellauer, Yakun Sophia Shao, Jason Clemons, Neal Crago, Kartik Hegde, Rangharajan Venkatesan, Steve Keckler, Christopher W. Fletcher, Joel Emer
IEEE Micro Top Picks in Computer Architecture (Honorable Mention)
DeLTA: GPU Performance Model for Deep Learning Applications with In-depth Memory System Traffic Analysis
Sangkug Lym, Donghyuk Lee, Mike O'Connor, Niladrish Chatterjee, Mattan Erez
Towards Analytically Evaluating the Error Resilience of GPU Programs
Abdul Rehman Anwer, Guanpeng Li, Karthik Pattabiraman, Siva Hari, Michael B. Sullivan, Timothy Tsai
On the Trend of Resilience for GPU-Dense Systems
Kyushick Lee, Michael B. Sullivan, Siva Hari, Timothy Tsai, Steve Keckler, Mattan Erez
Award paper
DeLTA: GPU Performance Model for Deep Learning Applications with In-depth Memory System Traffic Analysis
Sankug Lym, Donghyuk Lee, Niladrish Chatterjee, Mike O'Connor, Mattan Erez
Timeloop: A Systematic Approach to DNN Accelerator Evaluation
Angshuman Parashar, Priyanka Raina, Yakun Sophia Shao, Yu-Hsin Chen, Victor A. Ying, Anurag Mukkara, Rangharajan Venkatesan, Brucek Khailany, Steve Keckler, Joel Emer
DUCATI: High-performance Address Translation by Extending TLB Reach of GPU-accelerated Systems
Aamer Jaleel, Eiman Ebrahimi, Sam Duncan
Understanding the Future of Energy Efficiency in Multi-Module GPUs.
Akhil Arunkumar, Evgeny Bolotin, David Nellans, Carole-Jean Wu