Dr. Joel S. Emer joined NVIDIA in 2014 and is a member of the Architecture Research group. He is also a Professor of the Practice at MIT. He is responsible for exploration of future architectures as well as modeling and analysis methodologies. Prior to joining NVIDIA he worked at Intel where he was an Intel Fellow and Director of Microarchitecture Research.  Previously he worked at Compaq and Digital Equipment Corporation.

Steven Dalton joined NVIDIA Research in July 2014. He completed his Ph.D. in computer science at UIUC, where his research focused on mapping irregular operations on sparse matrices related to algebraic multigrid (AMG) methods to GPU architectures. Along with Nathan Bell, he was one of the primary contributors to our Cusp sparse linear algebra research library. He holds two Bachelor of Science degrees from Georgia Institute of Technology in the areas of Physics and Computer Science.

After completing my PhD in 1996, I continued working as a Research Associate at Princeton University. I joined IBM Research in 1998 to work on user-level messaging for cluster systems. Soon thereafter I joined the Blue Gene hardware group, where I contributed to the architecture of the Blue Gene/L system and co-designed its collective network. I continued to work on architecture, design, verification, and test of Blue Gene systems, including BG/P (snoop filter) and BG/Q (PCIe and I/O interface).

Hans Eberle joined the Networking Research Group in NVIDIA Research in 2014. Previously, he held positions at Oracle Labs, Sun Labs, ETH Zurich, and at the DEC Systems Research Center. He holds a Doctorate in Technical Sciences, a Diploma in Electrical Engineering, both from ETH Zurich, and an MBA in Sustainable Management from the Presidio Graduate School in San Francisco.

Dave Nellans joined NVIDIA in 2013 and leads the Architecture Research Group.

Nir Arad joined NVIDIA Research in February 2014 as senior research scientist in the Networking Research group. Prior to NVIDIA, he worked 6 years for Mellanox Technologies Limited, based at Yokneam, Israel, as a senior architect. Prior to Mellanox, Nir worked 10 years for Marvell Israel Limited, also based at Yokneam, Israel, which is part of the Marvell Technology Group, based at Santa Clara, CA. Nir served as co-chair of the Link Working Group (LWG) of the Infiniband Trade Association (IBTA) between 2008 and 2013. Nir holds B.Sc.

Mark Stephenson joined NVIDIA in February 2014.  He is primarily interested in program analysis, code generation, and architecture.  Before joining NVIDIA, Mark spent time at IBM Research, and the Massachusetts Institute of Technology, where he earned his PhD in 2006.

Yanqing joined NVIDIA Research in January of 2014. Prior to joining nVidia, he was a research assistant at the Robust Low Power VLSI research group at the University of Virginia (UVA),  where he received his PhD degree in 2013. While at UVA, his research focuses were on low power SoCs, sub-threshold digital circuit design, variation aware timing closure, and variation aware circuit design. Since joining NVIDIA, his research directions include machine learning for EDA applications, digital VLSI methodology, variation resilient digital design, and latch-based timing.

Alexander Reshetov received his Ph.D. degree from Keldysh Institute for Applied Mathematics (in Russia).

He joined Nvidia in January 2014. Prior to NVIDIA, he worked for 17 years in Intel Labs on 3D graphics algorithms and applications, and two years at the Super-Conducting Super-Collider Laboratory in Texas, where he was designing control system for the accelerator.