Brent presently serves as a Distinguished Research Scientist within the NVIDIA Circuits Research Group. He focuses primarily on low energy, high bandwidth memory integration into future AI systems.
Prior to his recent role, Brent worked as a Senior Fellow in the Pathfinding Team at Micron. Brent directed path finding into low energy, high performance memory products. He previously championed technology development programs including three generations of Hybrid Memory Cube (HMC). Brent also supported a variety of design efforts at Micron including first generation GDDR3 and GDDR4 devices, SLDRAM and many others. Brent also developed intellectual property in the high-performance memory space, supported strategic technology exploration of new product opportunities, and advanced Micron’s interests in a variety of external research organizations. Prior to joining Micron in 1992, Brent held design engineering positions at Texas Instruments, General Instruments, and Grass Valley Group. His 43 years of industry experience spans radar systems, avionics components, communication systems, broadcast television equipment, and solid-state memory.
Brent earned BSEE (1982) and MSEE (1996) degrees from the University of Idaho and was awarded an honorary doctorate in engineering science by the University of Idaho in 2015. He is an inventor on 332 U.S. patents and 230 foreign patents to date and coauthored the textbooks DRAM Circuit Design—Fundamental and High-Speed Topics and DRAM Circuit Design—A Tutorial, both published through Wiley-IEEE Press in 2008 and 2001 respectively.
