Hao's research aims to develop next-generation VLSI physical synthesis tools capable of generating sign-off quality layouts in advanced manufacturing nodes, particularly in analog/mixed-signal circuits. Due to the high complexity and sensitiveness of analog/mixed-signal circuits, a comprehensive layout system should consider various factors, including process variations, layout-dependent effects, parasitic, and design rules, to guarantee the layout performance and robustness. Hao's work leverages techniques from multiple research domains (e.g., machine learning, satisfiability modulo theories, optimization) to drive progress toward a fully automated analog layout system. Hao has also been exploring GPU-accelerated algorithms and reinforcement learning methods to enhance the efficiency and quality of the layout engine.
Hao Chen is a third-year Ph.D. student at the University of Texas at Austin, advised by Prof. David Z. Pan. His research interests span physical design algorithms, particularly in the layout synthesis for analog/mixed-signal circuits, formal methods for physical synthesis, and GPU-accelerated algorithms. His previous work includes detailed routing for analog circuits and analog layout constraints extraction using graph neural networks. Hao received the 3rd-place award in the CAD contest at ICCAD 2018, and the 3rd-place award in the Initial Detailed Routing contest of ISPD 2018. He received his B.S.E degree in Electrical Engineering from National Taiwan University.