Jason Clemons

Jason Clemons joined NVIDIA in March 2013 and is a member of the Architecture Research Group.  His current work focuses on the intersection of mobile computer vision and computer architecture.

He recieved his Ph.D. from the University of Michigan, Ann Arbor in 2013.  Prior to attending the University of Michigan, Jason worked at Whirlpool Corporation.  During his time there he complete his Masters of Science in Computer Science and Engineering as a part of the Whirlpool Technical Excellence Program.  He recieved his Bachelor Of Science in Electrical Engineering from Michigan Technological University in 2000.

Jaakko Lehtinen

Jaakko started out as a graphics programmer for Remedy Entertainment, an independent Helsinki, Finland based computer game studio, and contributed significantly to the look and feel of Max Payne 1 (2001), Max Payne 2 (2003) and Alan Wake (2010) through his work on rendering, modeling, and lighting technology. Jaakko obtained his Ph.D. from Helsinki University of Technology (now Aalto University School of Science and Technology) in 2007, after which he worked in research and teaching for two and a half years as a postdoctoral associate with Frédo Durand in the MIT graphics group. He joined NVIDIA Research in June 2010. Jaakko's interests span most areas of computer graphics, focusing on physically based rendering.

Sean Treichler

Sean Treichler is a Principal Research Scientist and has contributed to the architectures of multiple generations of NVIDIA GPU products. Having recently returned from the doctoral program in computer science at Stanford University, he is exploring the co-evolution of processor architectures and the programming models that drive them, with an emphasis on enabling programmers to quickly close the gap between theoretical and achieved performance for applications of interest in the scientific computing and machine learning communities.

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Trey Greer

Trey Greer joined NVIDIA's Circuits Research Group in April 2009. Prior to joining NVIDIA, he has worked on a variety of high-performance interconnect and graphics projects at Rambus, Velio Communications, PixelFusion, and Hewlett-Packard.

Timo Aila

Timo Aila joined NVIDIA Research in 2007 from Helsinki University of Technology, where he led the computer graphics research group. His expertise ranges from real-time rendering in computer games (eg. Max Payne, third-party engine development for numerous games, the first commercial occlusion culling library Umbra) to hardware architectures, and also to high-quality image synthesis with contributions to the PantaRay rendering system used in Avatar, Tintin, and Hobbit. He also gained expertise in mobile graphics as the chief scientist of Hybrid Graphics, which was acquired by NVIDIA in 2006.

Timo is currently working on machine learning in content creation and graphics. Previously he had a central role in NVIDIA's research efforts on ray tracing, stochastic rasterization, and light field reconstruction.

Tero Karras

Tero Karras is a principal research scientist at NVIDIA Research, which he joined in 2009. His research interests include machine learning for content creation, real time ray tracing, GPU computing, and parallel algorithms. He has had a pivotal role in NVIDIA's ray tracing research, especially related to efficient construction of acceleration structures.

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Stephen Tell

Stephen G. Tell joined NVIDIA's Circuits Research Group in April 2009. Prior to joining NVIDIA, he has worked on a variety of high-performance computation and interconnect projects at Rambus, Velio Communications, and the UNC Microelectronics Systems Lab.

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Steve Keckler

Steve Keckler joined NVIDIA in 2009 and leads the Architecture Research Group. He is also an Adjunct Professor of Computer Science at the University of Texas at Austin, where he served on the faculty from 1998-2012. His research interests include parallel computer architectures, high-performance computing, energy-efficient architectures, and embedded computing.  Dr. Keckler was previously at the Massachusetts Institute of Technology from 1990 to 1998, where he led the development of the M-Machine experimental parallel computer system. He is a Fellow of the ACM, a Fellow of the IEEE, an Alfred P. Sloan Research Fellow, and a recipient of the NSF CAREER award, the ACM Grace Murray Hopper award, the President's Associates Teaching Excellence Award at UT-Austin, and the Edith and Peter O’Donnell award for Engineering. He earned a B.S. in Electrical Engineering from Stanford University and an M.S. and a Ph.D. in Computer Science from the Massachusetts Institute of Technology. Full list of publications

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Michael Garland

Michael Garland joined NVIDIA in 2006 and is one of the founding members of NVIDIA Research. He currently leads the Programming Systems and Applications Research Group. Dr. Garland holds B.S. and Ph.D. degrees in Computer Science from Carnegie Mellon University, and was previously on the faculty of the Department of Computer Science of the University of Illinois at Urbana-Champaign. He has published numerous articles in leading conferences and journals on a range of topics including surface simplification, remeshing, texture synthesis, novice-friendly modeling, free-form animation, scientific visualization, graph mining, and visualizing complex graphs. His current research interests include computer graphics and visualization, geometric algorithms, and parallel algorithms and programming models.

John Poulton

John Poulton received a B.S. in Physics from Virginia Polytechnic Institute in 1967, an MS in Physics from the State University of New York at Stony Brook in 1969, and a Ph.D in Physics from the University of North Carolina at Chapel Hill in 1980.  He is a senior member of IEEE.  From 1981-1999 he was a researcher in the department of Computer Science at the University of North Carolina at Chapel Hill, where from 1995 he held the rank of Research Professor. He did research on VLSI-based architectures for graphics and imaging and was a principal contributor to the design and construction of several experimental high-performance graphics systems. Between 2000 and 2003 he served as Chief Engineer for Velio Communications, where he was engaged in development of gigabit signaling systems. Between 2003 and 2009, he held the position of Technical Director in Rambus, Inc's Chapel Hill, NC office, and was instrumental in developing Rambus' low-power signaling technology.

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