Michael Garland

Michael Garland joined NVIDIA in 2006 and is one of the founding members of NVIDIA Research. He currently leads the Programming Systems and Applications Research Group. Dr. Garland holds B.S. and Ph.D. degrees in Computer Science from Carnegie Mellon University, and was previously on the faculty of the Department of Computer Science of the University of Illinois at Urbana-Champaign. He has published numerous articles in leading conferences and journals on a range of topics including surface simplification, remeshing, texture synthesis, novice-friendly modeling, free-form animation, scientific visualization, graph mining, and visualizing complex graphs. His current research interests include computer graphics and visualization, geometric algorithms, and parallel algorithms and programming models.

John Poulton

John Poulton received a B.S. in Physics from Virginia Polytechnic Institute in 1967, an MS in Physics from the State University of New York at Stony Brook in 1969, and a Ph.D in Physics from the University of North Carolina at Chapel Hill in 1980.  He is a senior member of IEEE.  From 1981-1999 he was a researcher in the department of Computer Science at the University of North Carolina at Chapel Hill, where from 1995 he held the rank of Research Professor. He did research on VLSI-based architectures for graphics and imaging and was a principal contributor to the design and construction of several experimental high-performance graphics systems. Between 2000 and 2003 he served as Chief Engineer for Velio Communications, where he was engaged in development of gigabit signaling systems. Between 2003 and 2009, he held the position of Technical Director in Rambus, Inc's Chapel Hill, NC office, and was instrumental in developing Rambus' low-power signaling technology.

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Jared Hoberock

Jared Hoberock joined NVIDIA Research in October 2008. His interests include parallel programming models and physically-based rendering. Jared is the co-creator of Thrust, a high performance parallel algorithms library. While at NVIDIA, Jared has contributed to the DirectX graphics driver, Gelato, a final frame film renderer, and OptiX, a high-performance, programmable ray tracing engine. Jared received a Ph.D in computer science from the University of Illinois at Urbana-Champaign. He is a two-time recipient of the NVIDIA Graduate Research Fellowship.

Eric Enderton

Eric Enderton is a Principal Research Scientist at NVIDIA, where he has worked on stochastic transparency, GPU ray tracing, and other rendering algorithms.  He was a principal engineer on NVIDIA Gelato, the first GPU-accelerated film rendering software.  Eric began his career at Industrial Light & Magic, where his projects included the original NURBS stitching program for Terminator 2 and ILM's first GUI lighting software for Jurassic Park.  He went on to work at other major film studios before joining NVIDIA in 2003.  Eric earned his B.S. and M.S. degrees in computer science from the University of California at Berkeley.

 

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David Luebke

David Luebke helped found NVIDIA Research in 2006 after eight years on the faculty of the University of Virginia. Luebke received his Ph.D. under Fred Brooks at the University of North Carolina in 1998. His principal research interests are real-time computer graphics and GPU computing. Luebke is a Fellow of the IEEE; other honors include the NVIDIA Distinguished Inventor award, the NSF CAREER and DOE Early Career PI awards, and the ACM Symposium on Interactive 3D Graphics "Test of Time Award". Dr. Luebke has co-authored a book, a SIGGRAPH Electronic Theater piece, a major museum exhibit visited by over 110,000 people, and over a hundred papers, articles, chapters, and patents.

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David Kirk

David Kirk is an NVIDIA Fellow and served from 1997 to 2009 as NVIDIA's chief scientist, a role in which he led the development of graphics technology for today’s most popular consumer entertainment platforms.

Kirk received the Distinguished Alumni award from the California Institute of Technology in 2009.  He was elected in 2006 to the National Academy of Engineering (NAE) for his role in bringing high-performance graphics to personal computers. He received in 2002 the SIGGRAPH Computer Graphics Achievement Award for his role in bringing high-performance computer graphics systems to the mass market.

Prior to coming NVIDIA, he served from 1993 to 1996 as chief scientist and head of technology for Crystal Dynamics, a video game manufacturing company. From 1989 to 1991, Dr. Kirk was an engineer for the Apollo Systems Division of HP.

Kirk is the inventor of more than 60 patents and patent applications relating to graphics design and has published more than 50 articles on graphics technology.  He also authored the popular textbook “Programming Massively Parallel Processors” along with co-author Wen-mei W. Hwu.  He holds B.S. and M.S. degrees in mechanical engineering from Massachusetts Institute of Technology and M.S. and Ph.D. degrees in computer science from California Institute of Technology.

Brucek Khailany

Brucek Khailany joined NVIDIA in 2009 and currently leads the ASIC & VLSI Research group.  During his time at NVIDIA, he has contributed to projects within research and product groups on topics spanning computer architecture, unit micro-architecture, and ASIC and VLSI design techniques.  Previously, Dr. Khailany was a Co-Founder and Principal Architect at Stream Processors, Inc. (SPI) where he led research and development activities related to highly-parallel programmable processor architectures. At SPI, he helped lead the development of the industry's first commercially-available stream processor architecture targeting signal and image processing applications. From 1997-2003, at Stanford University, he led the silicon implementation of the Imagine stream processor, a research chip that introduced the concepts of stream processing and efficient partitioned register organizations. He received his Ph.D. and Masters in Electrical Engineering from Stanford University and received B.S.E. degrees in Electrical Engineering and Computer Engineering from the University of Michigan.

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William Dally

Bill Dally joined NVIDIA in January 2009 as chief scientist, after spending 12 years at Stanford University, where he was chairman of the computer science department. Dally and his Stanford team developed the system architecture, network architecture, signaling, routing and synchronization technology that is found in most large parallel computers today. Dally was previously at the Massachusetts Institute of Technology from 1986 to 1997, where he and his team built the J-Machine and the M-Machine, experimental parallel computer systems that pioneered the separation of mechanism from programming models and demonstrated very low overhead synchronization and communication mechanisms. From 1983 to 1986, he was at California Institute of Technology (CalTech), where he designed the MOSSIM Simulation Engine and the Torus Routing chip, which pioneered “wormhole” routing and virtual-channel flow control. He is a member of the National Academy of Engineering, a Fellow of the American Academy of Arts & Sciences, a Fellow of the IEEE and the ACM, and has received the ACM Eckert-Mauchly Award, the IEEE Seymour Cray Award, and the ACM Maurice Wilkes award. He has published over 250 papers, holds over 120 issued patents, and is an author of four textbooks. Dally received a bachelor's degree in Electrical Engineering from Virginia Tech, a master’s in Electrical Engineering from Stanford University and a Ph.D. in Computer Science from CalTech.  He was a cofounder of Velio Communications and Stream Processors.

Samuli Laine

Samuli Laine joined NVIDIA Research in 2007 after receiving his Ph.D. at Helsinki University of Technology. His research interests have ranged from photorealistic and real-time rendering to voxel-based graphics, GPU ray tracing, and 3D content creation. Currently Dr. Laine focuses on deep learning and its applications in computer graphics.

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