Buffets: An Efficient and Composable Storage Idiom for Explicit Decoupled Data Orchestration

Accelerators spend significant area and effort on custom onchip buffering. Unfortunately, these solutions are strongly tied to particular designs, hampering re-usability across other accelerators or domains.We present buffets, an efficient and composable storage idiom for the needs of accelerators that is independent of any particular design. Buffets have several distinguishing characteristics, including efficient decoupled fills and accesses with fine-grained synchronization, hierarchical composition, and efficient multi-casting. We implement buffets in RTL and show that they only add 2% control overhead over an 8KB RAM. When compared with DMA-managed double-buffered scratchpads and caches across a range of workloads, buffets improve energy-delay-product by 1.53x and 5.39x, respectively.


Yakun Sophia Shao (NVIDIA)
Kartik Hegde (University of Illinois Urbana-Champaign)
Christopher W. Fletcher (University of Illinois Urbana-Champaign)

Publication Date

Research Area

Uploaded Files


IEEE Micro Top Picks in Computer Architecture (Honorable Mention)