Hardware Abstractions for Targeting EDDO Architectures with the Polyhedral Model

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Unlike cache-based load-store architectures, Explicit De- coupled Data Orchestration (EDDO) architectures are pro- grammed using decoupled but synchronized programs run- ning at various units on the hardware, moving data between storage units and/or performing computations. As such, they present a unique programming challenge.

In this paper, we propose a set of hardware abstractions to represent EDDO architectures, enabling them to be targeted with the polyhedral model for statically analyzable work- loads. The abstractions are rich enough to support EDDO ar- chitectures with arbitrarily deep storage hierarchies, hierar- chical parallelism and support for temporal and spatial reuse exploitation via multicast, peer-to-peer communications, and spatial reduction. We also frame the abstractions within the context of an in-progress project called PolyEDDO, which is a mapping analysis and code-generation framework for EDDO architectures.


Prasanth Chatarasi (IBM Research)

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