Laminated packages, silicon interposer substrates, and special-purpose package- to-package interconnect, together with 3D stacking of silicon components enable systems with greatly improved computational power, memory capacity and bandwidth. These package options offer very high-bandwidth channels between chips on the same substrate. We employ ground-referenced single- ended signaling, a charge-pump transmitter, and a co-designed channel to provide communication between multiple chips on one package with high bandwidth per pin and low energy per bit.
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