Bio:

Rangharajan Venkatesan is a Senior Research Scientist in the ASIC & VLSI Research group in NVIDIA. He received the B.Tech. degree in Electronics and Communication Engineering from the Indian Institute of Technology,  Roorkee in 2009 and the Ph.D. degree in Electrical and Computer Engineering from Purdue University in August 2014. His research interests include variation-tolerant design methodologies, low power SoC design, machine learning, spintronic memories, and approximate computing.

Michael Bauer joined NVIDIA Research in October of 2014 after finishing his PhD in computer science at Stanford University.  As part of his thesis, he developed the Legion programming system for high performance supercomputing codes.  Legion is currently deployed in several production applications running on the top supercomputers in the world.  Michael was also the primary author of both the CudaDMA library and Singe DSL compiler, both of which were early examples of warp-specialized GPU programming.

Dr. Joel S. Emer joined NVIDIA in 2014 and is a member of the Architecture Research group. He is also a Professor of the Practice at MIT. He is responsible for exploration of future architectures as well as modeling and analysis methodologies. Prior to joining NVIDIA he worked at Intel where he was an Intel Fellow and Director of Microarchitecture Research.  Previously he worked at Compaq and Digital Equipment Corporation.

Steven Dalton joined NVIDIA Research in July 2014. He completed his Ph.D. in computer science at UIUC, where his research focused on mapping irregular operations on sparse matrices related to algebraic multigrid (AMG) methods to GPU architectures. Along with Nathan Bell, he was one of the primary contributors to our Cusp sparse linear algebra research library. He holds two Bachelor of Science degrees from Georgia Institute of Technology in the areas of Physics and Computer Science.

After completing my PhD in 1996, I continued working as a Research Associate at Princeton University. I joined IBM Research in 1998 to work on user-level messaging for cluster systems. Soon thereafter I joined the Blue Gene hardware group, where I contributed to the architecture of the Blue Gene/L system and co-designed its collective network. I continued to work on architecture, design, verification, and test of Blue Gene systems, including BG/P (snoop filter) and BG/Q (PCIe and I/O interface).

Hans Eberle joined the Networking Research Group in NVIDIA Research in 2014. Previously, he held positions at Oracle Labs, Sun Labs, ETH Zurich, and at the DEC Systems Research Center. He holds a Doctorate in Technical Sciences, a Diploma in Electrical Engineering, both from ETH Zurich, and an MBA in Sustainable Management from the Presidio Graduate School in San Francisco.

Dave Nellans joined NVIDIA in 2013 and leads the Architecture Research Group.