People

Daniel Lustig

Dan Lustig joined NVIDIA Research in December 2015.  He works in the area of computer architecture, with a particular focus on system architecture, memory system design, and memory consistency models.  His PhD thesis focused on specifying and verifying microarchitectural enforcement of memory models.

Dan received his PhD from Princeton in November 2015 under the supervision of Margaret Martonosi.  He received his MA from Princeton in 2011 and his BSE from the University of Pennsylvania in 2009.  He also received an Intel PhD Fellowship in 2013.

Research Area(s)
Computer Architecture
Programming Languages, Systems and Tools
Main Field of Interest
Computer Architecture
Google Scholar
https://scholar.google.com/citations?user=JgyxYiUAAAAJ&hl=en

Publications

2023

Parsimony: Enabling SIMD/Vector Programming in Standard Compiler Flows
Vijay Kandiah, Daniel Lustig, Oreste Villa, David Nellans, Nikos Hardavellas
International Symposium on Code Generation and Optimization

2022

Mixed-Proxy Extensions for the NVIDIA PTX Memory Consistency Model
Daniel Lustig, Simon Cooksey, Olivier Giroux
International Symposium on Computer Architecture (ISCA), Industry Track
IEEE Micro Top Picks in Computer Architecture (Honorable Mention)

2021

GPS: A Global Publish-Subscribe Model for Multi-GPU Memory Management
Harini Muthukrishnan, Daniel Lustig, David Nellans, Thomas Wenisch
International Symposium on Microarchitecture (MICRO)
Best Paper nominee, IEEE Micro Top Picks in Computer Architecture (Honorable Mention)
Efficient Multi-GPU Shared Memory via Automatic Optimization of Fine-Grained Transfers
Harini Muthukrishnan, David Nellans, Daniel Lustig, Jeffrey Fessler, Thomas Wenisch
International Symposium on Computer Architecture (ISCA)
Need for Speed: Experiences Building a Trustworthy System-Level GPU Simulator.
Oreste Villa, Daniel Lustig, Zi Yan, Evgeny Bolotin, Yaosheng Fu, Niladrish Chatterjee, Ted Jiang, David Nellans
International Symposium on High Performance Computer Architecture (HPCA)

2020

RealityCheck: Bringing Modularity, Hierarchy, and Abstraction to Automated Microarchitectural Memory Consistency Verification
Yatin A. Manerkar, Daniel Lustig, Margaret Martonosi
arXiv
HMG: Extending Cache Coherence Protocols Across Modern Hierarchical Multi-GPU Systems
Xiaowei Ren, Daniel Lustig, Evgeny Bolotin, Aamer Jaleel, Oreste Villa, David Nellans
International Symposium on High Performance Computer Architecture (HPCA)

2019

Translation Ranger: Operating System Support for Contiguity-Aware TLBs
Zi Yan, Daniel Lustig, David Nellans, Abhishek Bhattacharjee
International Symposium on Computer Architecture (ISCA)
Security Verification through Automatic Hardware-Aware Exploit Synthesis: The CheckMate Approach.
Caroline Trippel, Daniel Lustig, Margaret Martonosi
IEEE Micro (Issue: Top Picks of the 2018 Computer Architecture Conferences)
A Formal Analysis of the NVIDIA PTX Memory Consistency Model.
Daniel Lustig, Sameer Sahasrabuddhe, Olivier Giroux
International Conference on Architectural Support for Programming Languages and…
IEEE Micro Top Picks in Computer Architecture (Honorable Mention)
Nimble Page Management for Tiered Memory Systems
Zi Yan, Daniel Lustig, David Nellans, Abhishek Bhattacharjee
International Conference on Architectural Support for Programming Languages and…

2018

PipeProof: Automated Memory Consistency Proofs for Microarchitectural Specifications
Yatin A. Manerkar, Daniel Lustig, Margaret Martonosi, Aarti Gupta
International Symposium on Microarchitecture (MICRO)
IEEE Micro Top Picks in Computer Architecture (Honorable Mention), Best Paper nominee
CheckMate: Automated Synthesis of Hardware Exploits and Security Litmus Tests
Caroline Trippel, Daniel Lustig, Margaret Martonosi
International Symposium on Microarchitecture (MICRO)
IEEE Micro Top Picks in Computer Architecture
Full-Stack Memory Model Verification with TriCheck
Caroline Trippel, Yatin A. Manerkar, Daniel Lustig, Michael Pellauer, Margaret Martonosi
IEEE Micro (Issue: Top Picks of the 2017 Computer Architecture Conferences)
MeltdownPrime and SpectrePrime: Automatically-Synthesized Attacks Exploiting Invalidation-Based Coherence Protocols
Caroline Trippel, Daniel Lustig, Margaret Martonosi
arXiv

2017

RTLCheck: Verifying Memory Consistency in RTL Designs
Yatin A. Manerkar, Daniel Lustig, Margaret Martonosi, Michael Pellauer
International Symposium on Microarchitecture (MICRO)
IEEE Micro Top Picks in Computer Architecture (Honorable Mention)
Weak Memory Models with Matching Axiomatic and Operational Definitions
Sizhuo Zhang, Muralidaran Vijayaraghavan, Daniel Lustig, Arvind
arXiv
Automated Synthesis of Comprehensive Memory Model Litmus Test Suites
Daniel Lustig, Andrew Wright, Alexandros Papakonstantinou, Olivier Giroux
International Conference on Architectural Support for Programming Languages and…
TriCheck: Memory Model Verification at the Trisection of Software, Hardware, and ISA
Caroline Trippel, Yatin A. Manerkar, Daniel Lustig, Michael Pellauer, Margaret Martonosi
International Conference on Architectural Support for Programming Languages and…
IEEE Micro Top Picks in Computer Architecture

2016

Counterexamples and Proof Loophole for the C/C++ to POWER and ARMv7 Trailing-Sync Compiler Mappings
Yatin A. Manerkar, Caroline Trippel, Daniel Lustig, Michael Pellauer, Margaret Martonosi
arXiv
TriCheck: Memory Model Verification at the Trisection of Software, Hardware, and ISA
Caroline Trippel, Yatin A. Manerkar, Daniel Lustig, Michael Pellauer, Margaret Martonosi
arXiv

2015

CCICheck: Using μhb Graphs to Verify the Coherence-Consistency Interface
Yatin A. Manerkar, Daniel Lustig, Michael Pellauer, Margaret Martonosi
International Symposium on Microarchitecture (MICRO)
Efficient Control and Communication Paradigms for Coarse-Grained Spatial Architectures
Michael Pellauer, Angshuman Parashar, Michael Adler, Bushra Ahsan, Randy Almon, Neal Crago, Kermin Fleming, Mohit Gambhir, Aamer Jaleel, Tushar Krishna, Daniel Lustig, Stephen Maresh, Vladimir Pavlov, Rachid Rayess, Antonia Zhai, Joel Emer
ACM Transactions on Computing Systems (TOCS)