DRC-Coder: Automated DRC Checker Code Generation Using LLM Autonomous Agent

In the advanced technology nodes, the integrated design rule checker (DRC) is often utilized in place and route tools for fast optimization loops for power-performance-area. Implementing integrated DRC checkers to meet the standard of commercial DRC tools demands extensive human expertise to interpret foundry specifications, analyze layouts, and debug code iteratively. However, this labor-intensive process, requiring to be repeated by every update of technology nodes, prolongs the turnaround time of designing circuits.

Ximing Lu

Ximing Lu is a research staff of Large Language Model (LLM) Research at NVIDIA and a Ph.D. candidate at the University of Washington, advised by Professor Yejin Choi. She previously earned her B.S. degree in Computer Science at University of Washington. Her research interest centers around data synthesis, model architecture, science of LLMs, commonsense reasoning, knowledge acquisition, and multimodality. She is a co-recipient of the Best Paper Award at NAACL 2022 and the Outstanding Paper Award at EMNLP 2023.

Shuran Song

Shuran received her Ph.D. in Computer Science at Princeton University, BEng. at HKUST. Her research interests lie at the intersection of machine learning, computer vision, and robotics. Song’s research has been recognized through several awards, including the Best Paper Awards at RSS’22 and T-RO’20, Best System Paper Awards at CoRL’21, RSS’19, and finalists at RSS, ICRA, CVPR, and IROS. To learn more about Shuran’s work, please visit: https://shurans.github.io/