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Research Labs
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11 results found
Programming Languages, Systems and Tools
Clear all
2019
2017
Programming Languages, Systems and Tools
2019
Legate NumPy: Accelerated and Distributed Array Computing
Michael Bauer
,
Michael Garland
NVBit: A Dynamic Binary Instrumentation Framework for NVIDIA GPUs
Oreste Villa,
Mark Stephenson
,
David Nellans
,
Steve Keckler
Task Bench: A Parameterized Benchmark for Evaluating Parallel Runtime Performance
Elliott Slaughter, Wei Wu, Yuankun Fu, Legend Brandenburg, Nicolai Garcia, Wilhem Kautz, Emily Marx, Kaleb S. Morris, Qinglei Cao, George Bosilca, Seema Mirchandaney, Wonchan Lee, Sean Treichler, Patrick McCormick, Alex Aiken
Timeloop: A Systematic Approach to DNN Accelerator Evaluation
Angshuman Parashar
, Priyanka Raina, Yakun Sophia Shao, Yu-Hsin Chen, Victor A. Ying, Anurag Mukkara,
Rangharajan Venkatesan
,
Brucek Khailany
,
Steve Keckler
,
Joel Emer
Throughput-oriented GPU memory allocation
Isaac Gelado
,
Michael Garland
2017
Integrating External Resources with a Task-Based Programming Model
Zhihao Jia, Sean Treichler, Galen Shipman,
Michael Bauer
, Noah Watkins, Carlos Maltzahn, Patrick McCormick, Alex Aiken
A Novel Shard-Based Approach for Asynchronous Many-Task Models for In Situ Analysis
Philippe P. Pébaÿ, Giulio Borghesi, Hemanth Kolla, Janine C. Bennett, Sean Treichler
Control Replication: Compiling Implicit Parallelism to Efficient SPMD with Logical Regions
Elliott Slaughter, Wonchan Lee, Sean Treichler, Wen Zhang,
Michael Bauer
, Galen Shipman, Patrick McCormick, Alex Aiken
Relaxations for High-Performance Message Passing on Massively Parallel SIMT Processors
Benjamin Klenk, Holger Fröning,
Hans Eberle
,
Larry Dennison
Best Paper Award
Automated Synthesis of Comprehensive Memory Model Litmus Test Suites
Daniel Lustig
, Andrew Wright, Alexandros Papakonstantinou, Olivier Giroux
TriCheck: Memory Model Verification at the Trisection of Software, Hardware, and ISA
Caroline Trippel, Yatin A. Manerkar,
Daniel Lustig
,
Michael Pellauer
, Margaret Martonosi
IEEE Micro Top Picks in Computer Architecture