Mark Stephenson

Mark Stephenson joined NVIDIA in February 2014.  He is primarily interested in program analysis, code generation, and architecture.  Before joining NVIDIA, Mark spent time at IBM Research, and the Massachusetts Institute of Technology, where he earned his PhD in 2006.

Yanqing Zhang

Yanqing joined NVIDIA Research in January of 2014. Prior to joining nVidia, he was a research assistant at the Robust Low Power VLSI research group at the University of Virginia (UVA),  where he received his PhD degree in 2013. While at UVA, his research focuses were on low power SoCs, sub-threshold digital circuit design, variation aware timing closure, and variation aware circuit design. Since joining NVIDIA, his research directions include machine learning for EDA applications, digital VLSI methodology, variation resilient digital design, and latch-based timing.

Alexander Reshetov

Alexander Reshetov received his Ph.D. degree from Keldysh Institute for Applied Mathematics (in Russia).

He joined Nvidia in January 2014. Prior to NVIDIA, he worked for 17 years in Intel Labs on 3D graphics algorithms and applications, and two years at the Super-Conducting Super-Collider Laboratory in Texas, where he was designing control system for the accelerator.

Iuri Frosio

Iuri Frosio got his PhD in biomedical engineering at the Politecnico of Milan in 2006. He was a research fellow at the Computer Science Department of the University of Milan from 2003 and an assistant professor in the same department from 2006 to 2013. In the same period, he worked as a consultant for various companies in Italy and in the US. He joined NVIDIA in 2014 as senior research scientist, and since 2021 he has the role of principal research scientist. His research interests include image processing, computer vision, robotics, parallel programming, machine learning, and reinforcement learning.

Niladrish Chatterjee

Niladrish Chatterjee is a Senior Research Scientist in the Architecture Research Group.  His research focuses on realizing energy-efficient, high-performance memory and processor architectures that will power future supercomputers and artificially intelligent machines.



He received a PhD in Computer Engineering from the University of Utah in 2013, and a B.E. in Computer Science from Jadavpur University in 2007.

Matt Fojtik

Matt Fojtik joined the Circuits Research group of NVIDIA in October 2013. Prior to NVIDIA, he worked on various adaptive clocking projects, two-phase latch based timing, and low power microprocessor design. He received his B.S., M.S. and Ph.D. degrees in Electrical Engineering from the University of Michigan in 2008, 2010, and 2013 respectively.

Larry Dennison

Prior to NVIDIA, he worked on software systems such as high-performance distributed applications, database scaling for the cloud and software-defined networking. He also architected and led the development of the ASIC chipset for the Avici Terabit Router which utilized a 3-D toroidal network. At BBN, Dr. Dennison was the principal investigator for MicroPath, a wearable computer that connected to other wearables over a very low power RF network. Dr. Dennison holds Ph.D., M.S., and B.S.

Siva Hari

Siva Hari is a Senior Research Scientist in the Computer Architecture Research Group at NVIDIA.