Publications | Research

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Circuits and VLSI Design

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2017

Xylem: Enhancing Vertical Thermal Conduction in 3D Processor-Memory Stacks

Aditya Agrawal, Josep Torrellas, Sachin Idgunji

Ambit: In-Memory Accelerator for Bulk Bitwise Operations Using Commodity DRAM Technology

Vivek Seshadri, Donghyuk Lee, Thomas Mullins, Hasan Hassan, Amirali Boroumand, Jeremie Kim, Michael A. Kozuch, Onur Mutlu, Phillip B. Gibbons, Todd C. Mowry

Detecting and Mitigating Data-Dependent DRAM Failures by Exploiting Current Memory Content

Samira Khan, Chris Wilkerson, Zhe Wang, Alaa R. Alameldeen, Donghyuk Lee, Onur Mutlu

2016

Snatch: Opportunistically Reassigning Power Allocation between Processor and Memory in 3D Stacks

Dimitrios Skarlatos, Renji Thomas, Aditya Agrawal, Shibin Qin, Robert Pilawa-Podgurski, Ulya R. Karpuzcu, Radu Teodorescu, Nam Sung Kim, Josep Torrellas

Hybrid Modulation for Near Zero Display Latency

Trey Greer, Josef Spjut, David Luebke, Turner Whitted

Modeling and Analysis of Power Supply Noise Tolerance with Fine-grained GALS Adaptive Clocks

Divya Akella Kamakshi, Matt Fojtik, Brucek Khailany, Sudhir Kudva, Yaping Zhou, Benton H. Calhoun

ASYNC 2016 Best Paper Award Nominee

Current parking regulator for zero droop/overshoot load transient response

Sudhir Kudva, William Dally, Trey Greer, Tom Gray

A 6.5-to-23.3fJ/b/mm Balanced Charge-Recycling Bus in 16nm FinFET CMOS at 1.7-to-2.6Gb/s/wire with Clock Forwarding and Low-Crosstalk Contraflow Wiring

John Wilson, Matt Fojtik, John Poulton, Xi Chen, Stephen Tell, Trey Greer, Tom Gray, William Dally

A 28nm 2Mbit 6T SRAM with Highly Configurable Write Assist Implementation and Capacitor Based Sense Amplifier Input Offset Compen

Mahmut Sinangil, John Poulton, Matt Fojtik, Trey Greer, Stephen Tell, Andy Gotterba, Jesse Wang, Jason Golbus, William Dally, Tom Gray