Pontus Ebelin

After having received a master's degree in engineering mathematics at Lund University and finished an internship at NVIDIA, Pontus became an industrial PhD student at the company, supported by the Wallenberg AI, Autonomous Systems and Software Program. He is supervised by Tomas Akenine-Möller and he is affiliated to Lund University, where his supervisors are Kalle Åström and Magnus Oskarsson.

Hyperscale Graphics

Hyperscale Graphics

Adithya Murali

Ali Hatamizadeh

Ali Hatamizadeh is a Staff Research Scientist at NVIDIA Research. His research focuses on Large Language Models (LLMs), with an emphasis on the principled design of LLMs and advancing their reasoning capabilities. He received his PhD and MSc in Computer Science from the University of California, Los Angeles (UCLA).

Vishwesh Nath

Dr. Vishwesh Nath is an Applied Research Scientist at Nvidia. He works with the Clara DLMED Research Team and his research is focused towards medical imaging with sub-domains including AI-Assisted Annotation (DeepGrow 2D & 3D), Neural Architecture Search and Federated Learning.

Yoshi Nishi

Yoshinori Nishi received the B.S. and M.S. degrees in low-temperature physics from Waseda University, Tokyo, Japan, in 1997 and 1999, respectively. From 1999 to 2003, he was with NTT Electronics, Inc., Atsugi, Japan, as a member of the High-Speed Device Development Group, where he was a Chief Designer for the 50-Gb/s InP HEMT logic family, first 50-Gb/s product in the market in 2001.

Janne Hellsten

Accelerating Chip Design with Machine Learning

Recent advancements in machine learning provide an opportunity to transform chip design workflows. We review recent research applying techniques such as deep convolutional neural networks and graph-based neural networks in the areas of automatic design space exploration, power analysis, VLSI physical design, and analog design. We also present a future vision of an AI-assisted automated chip design workflow to aid designer productivity and automate optimization tasks.

Chaowei Xiao

DREAMPlace: Deep Learning Toolkit-Enabled GPU Acceleration for Modern VLSI Placement

Placement for very-large-scale integrated (VLSI) circuits is one of the most important steps for design closure. We propose a novel GPU-accelerated placement framework DREAMPlace, by casting the analytical placement problem equivalently to training a neural network. Implemented on top of a widely-adopted deep learning toolkit PyTorch, with customized key kernels for wirelength and density computations, DREAMPlace can achieve around 40× speedup in global placement without quality degradation compared to the state-of-the-art multi-threaded placer RePlAce.

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