Publications | Research

11 results found
Circuits and VLSI Design

Clear all

2025

FVDebug: An LLM-Driven Debugging Assistant for Automated Root Cause Analysis of Formal Verification Failures

Yunsheng Bai, Ghaith Bany Hamad, Chia-Tung (Mark) Ho, Syed Suhaib, Mark Haoxing Ren

Spec2RTL-Agent: Automated Hardware Code Generation from Complex Specifications Using LLM Agent Systems

Zhongzhi Yu, Mingjie Liu, Michael Zimmer, Yingyan (Celine) Lin, Yong Liu, Mark Haoxing Ren

AssertionForge: Enhancing Formal Verification Assertion Generation with Structured Representation of Specifications and RTL

Yunsheng Bai, Ghaith Bany Hamad, Syed Suhaib, Mark Haoxing Ren

GEM: GPU-Accelerated Emulator-Inspired RTL Simulation

Zizheng Guo, Yanqing Zhang, Mark Haoxing Ren

Best Paper Award Nomination at DAC, 2025

Marco: Configurable Graph-Based Task Solving and Multi-AI Agents Framework for Hardware Design

Chia-Tung (Mark) Ho, Jing Gong, Yunsheng Bai, Chenhui Deng, Mark Haoxing Ren, Brucek Khailany

2018

RouteNet: Routability Prediction for Mixed-size Designs using Convolutional Neural Network

Zhiyao Xie, Yu-Hung Huang, Guan-Qi Fang, Mark Haoxing Ren, Shao-Yun Fang, Yiran Chen, Hu Jiang

A Modular Digital VLSI Flow for High-Productivity SoC Design

Brucek Khailany, Evgeni Krimer, Rangharajan Venkatesan, Jason Clemons, Joel Emer, Matt Fojtik, Alicia Klinefelter, Michael Pellauer, Nathaniel Pinckney, Sophia Shao, Shreesha Srinath, Christopher Torng, Sam (Likun) Xi, Yanqing Zhang, Brian Zimmer

Hardware-Enabled Artificial Intelligence

William Dally, Tom Gray, John Poulton, Brucek Khailany, John Wilson, Larry Dennison

Ground-Referenced Signaling for Intra-Chip and Short-Reach Chip-to-Chip Interconnects

Walker Turner, John Poulton, John Wilson, Xi Chen, Stephen Tell, Matt Fojtik, Trey Greer, Brian Zimmer, Sanquan Song, Nikola Nedovic, Sudhir Kudva, Sunil Sudhakaran, Rizwan Bashirullah, Wenxu Zhao, William Dally, Tom Gray

A Switching Linear Regulator Based on a Fast-Self-Clocked Comparator with Very Low Probability of Meta-stability and a Parallel Analog Ripple Control Module

Sudhir Kudva, Sanquan Song, John Poulton, John Wilson, Wenxu Zhao, Tom Gray

A 1.17pJ/b 25Gb/s/pin Ground-Referenced Single Ended Serial Link for Off- and On-Package Communication in 16nm CMOS Using a Process- and Temperature-Adaptive Voltage Regulator

John Wilson, Walker Turner, John Poulton, Brian Zimmer, Xi Chen, Sanquan Song, Stephen Tell, Nikola Nedovic, Wenxu Zhao, Sunil Sudhakaran, Tom Gray, William Dally