Publications

Our publications provide insight into some of our leading-edge research.

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2016

Eyeriss: A Spatial Architecture for Energy-Efficient Dataflow for Convolutional Neural Networks
Yu-Hsin Chen, Joel Emer, Vivienne Sze
Accelerating Dependent Cache Misses with an Enhanced Memory Controller
Milad Hashemi, Khubaib, Eiman Ebrahimi, Onur Mutlu, Yale N. Patt
Bit-Plane Compression: Transforming Data for Better Compression in Many-core Architectures
Jungrae Kim, Michael B. Sullivan, Esha Choukse, Mattan Erez
LAP: Loop-Block Aware Inclusion Properties for Energy-Efficient Asymmetric Last Level Caches
Hsiang-Yun Cheng, Jishen Zhao, Jack Sampson, Mary Jane Irwin, Aamer Jaleel, Yu Lu, Yuan Xie
Transparent Offloading and Mapping (TOM): Enabling Programmer-Transparent Near-Data Processing in GPU Systems
Kevin Hsieh, Eiman Ebrahimi, Gwangsun Kim, Niladrish Chatterjee, Mike O'Connor, Nandita Vijaykumar, Onur Mutlu, Steve Keckler
Deep G-Buffers for Stable Global Illumination Approximation
Michael Mara, Morgan McGuire, Derek Nowrouzezahrai, David Luebke
Infinite Resolution Textures
Alexander Reshetov, David Luebke
Online Detection and Classification of Dynamic Hand Gestures with Recurrent 3D Convolutional Neural Networks
Pavlo Molchanov, Xiaodong Yang, Shaline Gupta, Kihwan Kim, Stephen Tyree, Jan Kautz
Accelerated Generative Models for 3D Point Cloud Data
Ben Eckart, Kihwan Kim, Alejandro Troccoli, Alonzo Kelly, Jan Kautz
All-Inclusive ECC: Thorough End-to-End Protection for Reliable Computer Memory
Jungrae Kim, Michael B. Sullivan, Sangkug Lym, Mattan Erez
Filtering Distributions of Normals for Shading Antialiasing
Anton Kaplanyan, Stephen Hill, Anjul Patney, Aaron Lefohn
Towards Selecting Robust Hand Gestures for Automotive Interfaces
Shalini Gupta, Pavlo Molchanov, Xiaodong Yang, Kihwan Kim, Stephen Tyree, Jan Kautz
A Real-time Energy-Efficient Superpixel Hardware Accelerator for Mobile Computer Vision Applications
Injoon Hong, Jason Clemons, Rangharajan Venkatesan, Iuri Frosio, Brucek Khailany, Steve Keckler
Hybrid Modulation for Near Zero Display Latency
Trey Greer, Josef Spjut, David Luebke, Turner Whitted
Modeling and Analysis of Power Supply Noise Tolerance with Fine-grained GALS Adaptive Clocks
Divya Akella Kamakshi, Matt Fojtik, Brucek Khailany, Sudhir Kudva, Yaping Zhou, Benton H. Calhoun
ASYNC 2016 Best Paper Award Nominee
S-Step and Communication-Avoiding Iterative Methods
Maxim Naumov
Stack-Based Algorithms for HDR Capture and Reconstruction
Orazio Gallo, Pradeep Sen
Current parking regulator for zero droop/overshoot load transient response
Sudhir Kudva, William Dally, Trey Greer, Tom Gray
Selective GPU Caches to Eliminate CPU-GPU HW Cache Coherence
Neha Agarwal, David Nellans, Eiman Ebrahimi, Thomas F. Wenisch, John Danskin, Steve Keckler
Towards High Performance Paged Memory for GPUs
Tianhao Zheng, David Nellans, Arslan Zulfiqar, Mark Stephenson, Steve Keckler
A Case for Toggle-Aware Compression for GPU Systems
Gennady Pekhimenko, Evgeny Bolotin, Nandita Vijaykumar, Onur Mutlu, Todd C. Mowry, Steve Keckler
Parallel Spectral Graph Partitioning
Maxim Naumov, Timothy Moon
An Analytical Model for Hardened Latch Selection and Exploration
Michael B. Sullivan, Brian Zimmer, Siva Hari, Timothy Tsai, Steve Keckler
Single-pass Parallel Prefix Scan with Decoupled Look-back
Duane Merrill, Michael Garland
vDNN: Virtualized Deep Neural Networks for Scalable, Memory-Efficient Neural Network Design
Minsoo Rhu, Natalia Gimelshein, Jason Clemons, Arslan Zulfiqar, Steve Keckler
A Phenomenological Scattering Model for Order-Independent Transparency
Morgan McGuire, Michael Mara
Real-time Rendering of Procedural Multiscale Materials
Tobias Zirr, Anton Kaplanyan
A 6.5-to-23.3fJ/b/mm Balanced Charge-Recycling Bus in 16nm FinFET CMOS at 1.7-to-2.6Gb/s/wire with Clock Forwarding and Low-Crosstalk Contraflow Wiring
John Wilson, Matt Fojtik, John Poulton, Xi Chen, Stephen Tell, Trey Greer, Tom Gray, William Dally
A 28nm 2Mbit 6T SRAM with Highly Configurable Write Assist Implementation and Capacitor Based Sense Amplifier Input Offset Compen
Mahmut Sinangil, John Poulton, Matt Fojtik, Trey Greer, Stephen Tell, Andy Gotterba, Jesse Wang, Jason Golbus, William Dally, Tom Gray

2015

CCICheck: Using μhb Graphs to Verify the Coherence-Consistency Interface
Yatin A. Manerkar, Daniel Lustig, Michael Pellauer, Margaret Martonosi
A Scalable Architecture for Ordered Parallelism
Mark C. Jeffery, Suvinay Subramanian, Cong Yang, Joel Emer, Daniel Sanchez
A Fast and Accurate Analytical Technique to Compute the AVF of Sequential Bits in a Processor
Steve Raasch, Arijis Biswas, Jon Stephan, Paul Racunas, Joel Emer