Publications

Our publications provide insight into some of our leading-edge research.

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2017

Toward Standardized Near-Data Processing with Unrestricted Data Placement for GPUs
Gwangsun Kim, Niladrish Chatterjee, Mike O'Connor, Kevin Hsieh
Understanding Error Propagation in Deep Learning Neural Network (DNN) Accelerators and Applications
Guanpeng Li, Siva Hari, Michael B. Sullivan, Timothy Tsai, Karthik Pattabiraman, Joel Emer, Steve Keckler
Fine-Grained DRAM: Energy-Efficient DRAM for Extreme Bandwidth Systems
Mike O'Connor, Niladrish Chatterjee, Donghyuk Lee, John Wilson, Aditya Agrawal, Steve Keckler, William Dally
Xylem: Enhancing Vertical Thermal Conduction in 3D Processor-Memory Stacks
Aditya Agrawal, Josep Torrellas, Sachin Idgunji
Ambit: In-Memory Accelerator for Bulk Bitwise Operations Using Commodity DRAM Technology
Vivek Seshadri, Donghyuk Lee, Thomas Mullins, Hasan Hassan, Amirali Boroumand, Jeremie Kim, Michael A. Kozuch, Onur Mutlu, Phillip B. Gibbons, Todd C. Mowry
Detecting and Mitigating Data-Dependent DRAM Failures by Exploiting Current Memory Content
Samira Khan, Chris Wilkerson, Zhe Wang, Alaa R. Alameldeen, Donghyuk Lee, Onur Mutlu
RTLCheck: Verifying Memory Consistency in RTL Designs
Yatin A. Manerkar, Daniel Lustig, Margaret Martonosi, Michael Pellauer
IEEE Micro Top Picks in Computer Architecture (Honorable Mention)
Beyond the Socket: NUMA-Aware GPUs
Ugljesa Milic, Oreste Villa, Evgeny Bolotin, Akhil Arunkumar, Eiman Ebrahimi, Aamer Jaleel, Alex Ramirez, David Nellans
Weak Memory Models with Matching Axiomatic and Operational Definitions
Sizhuo Zhang, Muralidaran Vijayaraghavan, Daniel Lustig, Arvind
BATMAN: Maximizing Bandwidth Utilization of Hybrid Memory Systems
Chiachen Chou, Aamer Jaleel, Moinuddin Qureshi
MCM-GPU: Multi-Chip-Module GPUs for Continued Performance Scalability
Akhil Arunkumar , Evgeny Bolotin, Benjamin Cho, Ugljesa Milic , Eiman Ebrahimi, Oreste Villa, Aamer Jaleel, Carole-Jean Wu , David Nellans
SCNN: An Accelerator for Compressed-sparse Convolutional Neural Networks
Angshuman Parashar, Minsoo Rhu, Anurag Mukkara, Antonio Puglielli, Rangharajan Venkatesan, Brucek Khailany, Joel Emer, Steve Keckler, William Dally
Fractal: An Execution Model for Fine-Grain Nested Speculative Parallelism
Suvinay Subramanian, Mark C. Jeffrey, Maleen Abeydeera, Hyun Ryong Lee, Victor A. Ying, Joel Emer, Daniel Sanchez
Understanding Reduced-Voltage Operation in Modern DRAM Devices: Experimental Characterization, Analysis, and Mechanisms
Kevin Chang, Abdullah Giray Yağlıkçı, Saugata Ghose, Aditya Agrawal, Niladrish Chatterjee, Abhijith Kashyap, Donghyuk Lee, Mike O'Connor, Hasan Hassan, Onur Mutlu
Design-Induced Latency Variation in Modern DRAM Chips: Characterization, Analysis, and Latency Reduction Mechanisms
Donghyuk Lee, Samira Khan, Lavanya Subramanian, Saugata Ghose, Rachata Ausavarungnirun, Gennady Pekhimenko, Vivek Seshadri, Onur Mutlu
Understanding Reduced-Voltage Operation in Modern DRAM Chips: Characterization, Analysis, and Mechanisms
Kevin K. Chang, Abdullah Giray Yağlıkçı, Saugata Ghose, Aditya Agrawal, Niladrish Chatterjee, Abhijith Kashyap, Donghyuk Lee, Mike O'Connor, Hasan Hassan, Onur Mutlu
SCNN: An Accelerator for Compressed-sparse Convolutional Neural Networks
Angshuman Parashar, Minsoo Rhu, Anurag Mukkara, Antonio Puglielli, Rangharajan Venkatesan, Brucek Khailany, Joel Emer, Steve Keckler, William Dally
Compressing DMA Engine: Leveraging Activation Sparsity for Training Deep Neural Networks
Minsoo Rhu, Mike O'Connor, Niladrish Chatterjee, Jeff Pool, Stephen W. Keckler
SASSIFI: An Architecture-level Fault Injection Tool for GPU Application Resilience Evaluation
Siva Hari, Timothy Tsai, Mark Stephenson, Steve Keckler, Joel Emer
Automated Synthesis of Comprehensive Memory Model Litmus Test Suites
Daniel Lustig, Andrew Wright, Alexandros Papakonstantinou, Olivier Giroux
TriCheck: Memory Model Verification at the Trisection of Software, Hardware, and ISA
Caroline Trippel, Yatin A. Manerkar, Daniel Lustig, Michael Pellauer, Margaret Martonosi
IEEE Micro Top Picks in Computer Architecture
SoftMC: A Flexible and Practical Open-Source Infrastructure for Enabling Experimental DRAM Studies
Hasan Hassan, Nandita Vijaykumar, Samira Khan, Saugata Ghose, Kevin Chang, Gennady Pekhimenko, Donghyuk Lee, Oguz Ergin, Onur Mutlu
Architecting an Energy-Efficient DRAM System for GPUs
Niladrish Chatterjee, Mike O'Connor, Donghyuk Lee, Daniel Johnson, Minsoo Rhu, Steve Keckler, William Dally

2015

CCICheck: Using μhb Graphs to Verify the Coherence-Consistency Interface
Yatin A. Manerkar, Daniel Lustig, Michael Pellauer, Margaret Martonosi
A Scalable Architecture for Ordered Parallelism
Mark C. Jeffery, Suvinay Subramanian, Cong Yang, Joel Emer, Daniel Sanchez
A Fast and Accurate Analytical Technique to Compute the AVF of Sequential Bits in a Processor
Steve Raasch, Arijis Biswas, Jon Stephan, Paul Racunas, Joel Emer
Exploiting Asymmetry in Booth-Encoded Multipliers for Reduced Energy Multiplication
Mike O'Connor, Earl Swartzlander, Jr.
Anatomy of GPU Memory System for Multi-Application Execution
Adwait Jog, Onur Kayiran, Tuba Kesten, Ashutosh Pattnaik, Evgeny Bolotin, Niladrish Chatterjee, Steve Keckler, Mahmut T. Kandemir, Chita R. Das
GPU Computing Pipeline Inefficiencies and Optimization Opportunities in Heterogeneous CPU-GPU Processors
Joel Hestness, Steve Keckler, David A. Wood
Scavenger: Automating the Construction of Application-Optimized Memory Hierarchies
Hsin-Jung Yang, Kermin Fleming, Michael Adler, Felix Winterstein, Joel Emer
Efficient Control and Communication Paradigms for Coarse-Grained Spatial Architectures
Michael Pellauer, Angshuman Parashar, Michael Adler, Bushra Ahsan, Randy Almon, Neal Crago, Kermin Fleming, Mohit Gambhir, Aamer Jaleel, Tushar Krishna, Daniel Lustig, Stephen Maresh, Vladimir Pavlov, Rachid Rayess, Antonia Zhai, Joel Emer
MemcachedGPU: Scaling-up Scale-out Key-value Stores
Tayler Hetherington, Mike O'Connor, Tor Aamodt