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2020

The Architectural Implications of Distributed Reinforcement Learning on CPU-GPU Systems

Ahmet Inci, Evgeny Bolotin, Yaosheng Fu, Gal Dalal, Shie Mannor, David Nellans, Diana Marculescu

GPU-Trident: Efficient Modeling of Error Propagation in GPU Programs

Abdul Rehman Anwer, Guanpeng Li, Karthik Pattabiraman, Michael B. Sullivan, Timothy Tsai, Siva Hari

CaSA: End-to-end Quantitative Security Analysis of Randomly Mapped Caches

Thomas Bourgeat, Jules Drean, Yuheng Yang, Lillian Tsai, Joel Emer, Mengjia Yan

Locality-Centric Data and Threadblock Management for Massive GPUs

Mahmoud Khairy, Vadim Nikiforov, David Nellans, Timothy G. Rogers

HarDNN: Fine-Grained Vulnerability Evaluation and Protection for Convolutional Neural Networks

Abdulrahman Mahmoud, Siva Hari, Christopher W. Fletcher, Sarita V. Adve, Charbel Sakr, Naresh Shanbhag, Pavlo Molchanov, Michael B. Sullivan, Timothy Tsai, Steve Keckler

How to Evaluate Deep Neural Network Processors: TOPS/W (Alone) Considered Harmful

Vivienne Sze, Yu-Hsin Chen, Tien-Ju Yang, Joel Emer

Planaria: Dynamic Architecture Fission for Spatial Multi-Tenant Acceleration of Deep Neural Networks

Soroush Ghodrati, Byung Hoon Ahn, Joon Kyung Kim, Sean Kinzer, Brahmendra Reddy Yatham, Navateja Alla, Hardik Sharma, Mohammad Alian, Eiman Ebrahimi, Nam Sung Kim, Cliff Young, Hadi Esmaeilzadeh

PyTorchFI: A Runtime Perturbation Tool for DNNs

Abdulrahman Mahmoud, Neeraj Aggarwal, Alex Nobbe, Jose Rodrigo Sanchez Vicarte, Sarita V. Adve, Christopher W. Fletcher, Iuri Frosio, Siva Hari

EMOGI: Efficient Memory-access for Out-of-memory Graph-traversal In GPUs

Seung Won Min, Vikram Sharma Mailthody, Zaid Qureshi, Jinjun Xiong, Eiman Ebrahimi, Wen-mei Hwu

Making Convolutions Resilient via Algorithm-Based Error Detection Techniques

Siva Hari, Michael B. Sullivan, Timothy Tsai, Steve Keckler

There’s Plenty of Room at the Top: What Will Drive Computer Performance after Moore’s Law?

Charles E. Leiserson, Neil C. Thompson, Joel Emer, Bradley C. Kuszmaul, Butler W. Lampson, Daniel Sanchez , Tao B. Schardl

Buddy Compression: Enabling Larger Memory for Deep Learning and HPC Workloads on GPUs

Esha Chouske, Michael B. Sullivan, Mike O'Connor, Mattan Erez, Jeff Pool, David Nellans, Steve Keckler

An In-Network Architecture for Accelerating Shared-Memory Multiprocessor Collectives

Benjamin Klenk, Ted Jiang, Greg Thorson, Larry Dennison

Estimating Silent Data Corruption Rates Using a Two-Level Model

Siva Hari, Paolo Rech, Timothy Tsai, Mark Stephenson, Arslan Zulfiqar, Michael B. Sullivan, Philip Shirvani, Paul Racunas, Joel Emer, Steve Keckler

MAESTRO: A Data-Centric Approach to Understand Reuse, Performance, and Hardware Cost of DNN Mappings

Hyoukjun Kwon, Prasanth Chatarasi, Vivek Sarkar, Tushar Krishna, Michael Pellauer, Angshuman Parashar

BYOC: A "Bring Your Own Core" Framework for Heterogeneous-ISA Research

Jonathan Balkind, Katie Lim, Michael Schaffner, Fei Gao, Grigory Chirkov, Ang Li, Alexey Lavrov, Tri M. Nguyen, Yaosheng Fu, Florian Zaruba, Kunal Gulati, Luca Benini, David Wentzlaf

Safecracker: Leaking Secrets through Compressed Caches

Po-An Tsai, Andres Sanchez, Christopher W. Fletcher, Daniel Sanchez

IEEE Micro Top Picks in Computer Architecture

RealityCheck: Bringing Modularity, Hierarchy, and Abstraction to Automated Microarchitectural Memory Consistency Verification

Yatin A. Manerkar, Daniel Lustig, Margaret Martonosi

Feature Map Vulnerability Evaluation in CNNs

Abdulrahman Mahmoud, Siva Hari, Christopher W. Fletcher, Sarita V. Adve, Charbel Sakr, Naresh Shanbhag, Pavlo Molchanov, Michael B. Sullivan, Timothy Tsai, Steve Keckler

HarDNN: Feature Map Vulnerability Evaluation in CNNs

Abdulrahman Mahmoud, Siva Hari, Christopher W. Fletcher, Sarita V. Adve, Charbel Sakr, Naresh Shanbhag, Pavlo Molchanov, Michael B. Sullivan, Timothy Tsai, Steve Keckler

HMG: Extending Cache Coherence Protocols Across Modern Hierarchical Multi-GPU Systems

Xiaowei Ren, Daniel Lustig, Evgeny Bolotin, Aamer Jaleel, Oreste Villa, David Nellans

Speculative Reconvergence for Improved SIMT Efficiency

Sana Damani, Daniel Johnson, Mark Stephenson, Eddie Yan, Olivier Giroux, Michael McKeown, Steve Keckler

2016

Counterexamples and Proof Loophole for the C/C++ to POWER and ARMv7 Trailing-Sync Compiler Mappings

Yatin A. Manerkar, Caroline Trippel, Daniel Lustig, Michael Pellauer, Margaret Martonosi

Snatch: Opportunistically Reassigning Power Allocation between Processor and Memory in 3D Stacks

Dimitrios Skarlatos, Renji Thomas, Aditya Agrawal, Shibin Qin, Robert Pilawa-Podgurski, Ulya R. Karpuzcu, Radu Teodorescu, Nam Sung Kim, Josep Torrellas

CANDY: Enabling Coherent DRAM Caches for Multi-Node Systems

Chiachen Chou, Aamer Jaleel, Moinuddin Qureshi

Co-Designing Accelerators and SoC Interfaces Using gem5-Aladdin

Yakun Sophia Zhao, Sam (Likun) Xi, Vijayalakshmi Srinivasan, Gu-Yeon Wei, David Brooks

Data-Centric Execution of Speculative Parallel Programs

Mark C. Jeffrey, Suvinay Subramanian, Maleen Abeydeera, Joel Emer, Daniel Sanchez

A Patch Memory System For Image Processing and Computer Vision.

Jason Clemons, Chih-Chi Cheng, Iuri Frosio, Daniel Johnson, Steve Keckler

vDNN: Virtualized Deep Neural Networks for Scalable, Memory-Efficient Neural Network Design.

Minsoo Rhu, Natalia Gimelshein, Jason Clemons, Arslan Zulfiqar, Steve Keckler

The Bunker Cache for Spatio-Value Approximation

Joshua San Miguel, Jorge Albericio, Aamer Jaleel, Natalie Enright Jerger