People

John Wilson

John Wilson received his B.S., M.S., and Ph.D. degrees in electrical engineering from North Carolina State University (NCSU), Raleigh. He is a principal research scientist with the Circuits Research Group, NVIDIA Inc., Durham, North Carolina. From 2003 to 2006, he was a research professor at NCSU leading projects in advanced packaging, ac-coupled communication in 2.5D/3D ICs, and on-chip global signaling. From 2006 to 2012, he worked with Rambus Inc. on high-speed input–output (I/O) circuit design and methods to mitigate signal and power integrity problems in single-ended interfaces. His research interests include high-speed I/O circuit design, on-chip signaling, signal integrity, advanced packaging, and chip/package co-design. He has more than 70+ publications and 45 granted patents. He is a Senior Member of the IEEE.

Research Area(s)
Circuits and VLSI Design
Main Field of Interest
Circuits and VLSI Design

Publications

2024

A 0.190-pJ/bit 25.2-Gb/s/wire Inverter-Based AC-Coupled Transceiver for Short-Reach Die-to-Die Interfaces in 5-nm CMOS
Yoshinori Nishi, John W. Poulton, Xi Chen, Sanquan Song, Brian Zimmer, Walker Turner, Stephen Tell, Nikola Nedovic, John Wilson, William Dally, Tom Gray
IEEE Journal of Solid-State Circuits (JSSC) (Volume: 59, Issue: 4, April 2024)

2023

A 0.190-pJ/bit 25.2-Gb/s/wire Inverter-Based AC-Coupled Transceiver for Short-Reach Die-to-Die Interfaces in 5-nm CMOS
Yoshinori Nishi, John W. Poulton, Xi Chen, Sanquan Song, Brian Zimmer, Walker Turner, Stephen Tell, Nikola Nedovic, John Wilson, William Dally, Tom Gray
2023 IEEE SYMPOSIUM ON VLSI TECHNOLOGY & CIRCUITS
A 0.297-pJ/Bit 50.4-Gb/s/Wire Inverter-Based Short-Reach Simultaneous Bi-Directional Transceiver for Die-to-Die Interface in 5-nm CMOS
Yoshinori Nishi, John W. Poulton, Walker Turner, Xi Chen, Sanquan Song, Brian Zimmer, Stephen Tell, Nikola Nedovic, John Wilson, William Dally, Tom Gray
IEEE Journal of Solid-State Circuits ( Volume: 58, Issue: 4, April 2023)

2022

A 0.297-pJ/bit 50.4-Gb/s/wire Inverter-Based Short-Reach Simultaneous Bidirectional Transceiver for Die-to-Die Interface in 5nm CMOS
Yoshinori Nishi, John W. Poulton, Xi Chen, Sanquan Song, Brian Zimmer, Walker Turner, Stephen Tell, Nikola Nedovic, John Wilson, William Dally, Tom Gray
2022 IEEE SYMPOSIUM ON VLSI TECHNOLOGY & CIRCUITS

2020

Reference-Noise Compensation Scheme for Single- Ended Package-to-Package Links
Xi Chen, Nikola Nedovic, Stephen Tell, Sudhir Kudva, Brian Zimmer, Trey Greer, John Poulton, Sanquan Song, Walker Turner, John Wilson, Tom Gray
2020 International Solid-State Circuits Conference

2019

A 1.17-pJ/b, 25-Gb/s/pin Ground-Referenced Single-Ended Serial Link for Off- and On-Package Communication Using a Process- and Temperature-Adaptive Voltage Regulator
John Poulton, John Wilson, Walker Turner, Brian Zimmer, Xi Chen, Sudhir Kudva, Sanquan Song, Stephen Tell, Nikola Nedovic, Wenxu Zhao, Sunil Sudhakaran, Tom Gray, William Dally
IEEE JOURNAL OF SOLID-STATE CIRCUITS

2018

Hardware-Enabled Artificial Intelligence
William Dally, Tom Gray, John Poulton, Brucek Khailany, John Wilson, Larry Dennison
Symposia on VLSI Technology and Circuits
Ground-Referenced Signaling for Intra-Chip and Short-Reach Chip-to-Chip Interconnects
Walker Turner, John Poulton, John Wilson, Xi Chen, Stephen Tell, Matt Fojtik, Trey Greer, Brian Zimmer, Sanquan Song, Nikola Nedovic, Sudhir Kudva, Sunil Sudhakaran, Rizwan Bashirullah, Wenxu Zhao, William Dally, Tom Gray
Custom Integrated Circuits Conference
A Switching Linear Regulator Based on a Fast-Self-Clocked Comparator with Very Low Probability of Meta-stability and a Parallel Analog Ripple Control Module
Sudhir Kudva, Sanquan Song, John Poulton, John Wilson, Wenxu Zhao, Tom Gray
Custom Integrated Circuits Conference
A 1.17pJ/b 25Gb/s/pin Ground-Referenced Single Ended Serial Link for Off- and On-Package Communication in 16nm CMOS Using a Process- and Temperature-Adaptive Voltage Regulator
John Wilson, Walker Turner, John Poulton, Brian Zimmer, Xi Chen, Sanquan Song, Stephen Tell, Nikola Nedovic, Wenxu Zhao, Sunil Sudhakaran, Tom Gray, William Dally
ISSCC

2017

Fine-Grained DRAM: Energy-Efficient DRAM for Extreme Bandwidth Systems
Mike O'Connor, Niladrish Chatterjee, Donghyuk Lee, John Wilson, Aditya Agrawal, Steve Keckler, William Dally
International Symposium on Microarchitecture (MICRO)

2016

A 6.5-to-23.3fJ/b/mm Balanced Charge-Recycling Bus in 16nm FinFET CMOS at 1.7-to-2.6Gb/s/wire with Clock Forwarding and Low-Crosstalk Contraflow Wiring
John Wilson, Matt Fojtik, John Poulton, Xi Chen, Stephen Tell, Trey Greer, Tom Gray, William Dally
International Solid-State Circuits Conference (ISSCC 2016)

2015

High-speed Low-power On-chip Global Signaling Design Overview
Xi Chen, John Wilson, John Poulton, Rizwan Bashirullah, Tom Gray
DesignCon

2013

A 0.54 pJ/b 20 Gb/s Ground-Referenced Single-Ended Short-Reach Serial Link in 28 nm CMOS for Advanced Packaging Applications
John Poulton, William Dally, Xi Chen, John Eyles, Trey Greer, Stephen Tell, John Wilson, Tom Gray
Journal of Solid State Circuits