Publications | Research

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Circuits and VLSI Design

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2021

NVCell: Standard Cell Layout in Advanced Technology Nodes with Reinforcement Learning

Haoxing (Mark) Ren, Matt Fojtik, Brucek Khailany

Softermax: Hardware/Software Co-Design of an Efficient Softmax for Transformers

Jacob R. Stevens, Rangharajan Venkatesan, Steve Dai, Brucek Khailany, Anand Raghunathan

IPA: Floorplan-Aware SystemC Interconnect Performance Modeling and Generation for HLS-based SoCs

Nathaniel Pinckney, Rangharajan Venkatesan, Ben Keller, Brucek Khailany

Graph Learning-Based Arithmetic Block Identification

Zhuolun He, Ziyi Wang, Chen Bai, Haoyu Yang, Bei Yu

Simba: scaling deep-learning inference with chiplet-based architecture

Yakun Sophia Shao, Jason Clemons, Rangharajan Venkatesan, Brian Zimmer, Matt Fojtik, Ted Jiang, Ben Keller, Alicia Klinefelter, Nathaniel Pinckney, Priyanka Raina, Stephen Tell, Yanqing Zhang, William Dally, Joel Emer, Tom Gray, Brucek Khailany, Steve Keckler

ACM Research Highlight

VS-QUANT: Per-Vector Scaled Quantization for Accurate Low-Precision Neural Network Inference

Steve Dai, Rangharajan Venkatesan, Haoxing (Mark) Ren, Brian Zimmer, William Dally, Brucek Khailany

Fair and Comprehensive Benchmarking of Machine Learning Processing Chips

Geoffrey W. Burr, SukHwan Lim, Boris Murmann, Rangharajan Venkatesan, Marian Verhelst

Verifying High-Level Latency-Insensitive Designs with Formal Model Checking

Steve Dai, Alicia Klinefelter, Haoxing (Mark) Ren, Rangharajan Venkatesan, Ben Keller, Nathaniel Pinckney, Brucek Khailany

Ground-Referenced Single-Ended Signaling: Applications for High-Density Short-Haul Communication Systems

John Wilson, Walker Turner, John Poulton

Parasitic-Aware Analog Circuit Sizing with Graph Neural Networks and Bayesian Optimization

Mingjie Liu, Walker Turner, George Kokai, David Z. Pan, Brucek Khailany, Haoxing (Mark) Ren

MAVIREC: ML-Aided Vectored IR-Drop Estimation and Classification

Vidya A. Chhabria, Yanqing Zhang, Haoxing (Mark) Ren, Ben Keller, Brucek Khailany, Sachin S. Sapatnekar

Standard Cell Routing with Reinforcement Learning and Genetic Algorithm in Advanced Technology Nodes

Haoxing (Mark) Ren, Matt Fojtik

2020

NVCell: Generate Standard Cell Layout in Advanced Technology Nodes with Reinforcement Learning

Haoxing (Mark) Ren, Matt Fojtik, Brucek Khailany

How Software Can "Chip In" to the IC Design Process: A Multidisciplinary Approach May Attract New Talent and Accelerate Innovation

Alicia Klinefelter

Opportunities for RTL and Gate Level Simulation using GPUs

Yanqing Zhang, Haoxing (Mark) Ren, Brucek Khailany

Accelerating Chip Design with Machine Learning

Brucek Khailany, Haoxing (Mark) Ren, Steve Dai, Saad Godil, Ben Keller, Robert Kirby, Alicia Klinefelter, Rangharajan Venkatesan, Yanqing Zhang, Bryan Catanzaro, William Dally

ParaGraph: Layout Parasitics and Device Parameter Prediction using Graph Neural Networks

Haoxing (Mark) Ren, George Kokai, Walker Turner, Ting-Sheng Ku

GRANNITE: Graph Neural Network Inference for Transferable Power Estimation

Yanqing Zhang, Haoxing (Mark) Ren, Brucek Khailany

DREAMPlace: Deep Learning Toolkit-Enabled GPU Acceleration for Modern VLSI Placement

Yibo Lin, Zixuan Jiang, Jiaqi Gu, Wuxi Li, Shounak Dhar, Haoxing (Mark) Ren, Brucek Khailany, David Z. Pan

2021 IEEE Transactions on Computer-Aided Design Donald O. Pederson Best Paper Award

Reference-Noise Compensation Scheme for Single- Ended Package-to-Package Links

Xi Chen, Nikola Nedovic, Stephen Tell, Sudhir Kudva, Brian Zimmer, Trey Greer, John Poulton, Sanquan Song, Walker Turner, John Wilson, Tom Gray

ABCDPlace: Accelerated Batch-based Concurrent Detailed Placement on Multi-threaded CPUs and GPUs

Yibo Lin, Wuxi Li, Jiaqi Gu, Haoxing (Mark) Ren, Brucek Khailany, David Z. Pan

A 0.32–128 TOPS, Scalable Multi-Chip-Module-Based Deep Neural Network Inference Accelerator With Ground-Referenced Signaling in 16 nm

Brian Zimmer, Rangharajan Venkatesan, Yakun Sophia Shao, Jason Clemons, Matt Fojtik, Ted Jiang, Ben Keller, Alicia Klinefelter, Nathaniel Pinckney, Priyanka Raina, Stephen Tell, Yanqing Zhang, William Dally, Joel Emer, Tom Gray, Steve Keckler, Brucek Khailany

JSSC 2020 Best Paper award

FIST: A Feature-Importance Sampling and Tree-Based Method for Automatic Design Flow Parameter Tuning

Zhiyao Xie, Guan-Qi Fang, Yu-Hung Huang, Haoxing (Mark) Ren, Yanqing Zhang, Brucek Khailany, Shao-Yun Fang, Jiang Hu, Yiran Chen, Erick Carvajal Barboza

PowerNet: Transferable Dynamic IR Drop Estimation via Maximum Convolutional Neural Network

Zhiyao Xie, Haoxing (Mark) Ren, Brucek Khailany, Ye Sheng, Santosh Santosh, Jiang Hu, Yiran Chen