Publications | Research

Mingjie Liu, Teo Ene, Robert Kirby, Chris Cheng, Nathaniel Pinckney, Rongjian Liang, Jonah Alben, Himyanshu Anand, Sanmitra Banerjee, Ismet Bayraktaroglu, Bonita Bhaskaran, Bryan Catanzaro, Arjun Chaudhuri, Sharon Clay, Bill Dally, Laura Dang, Parikshit Deshpande, Siddhanth Dhodhi, Sameer Halepete, Eric Hill, Jiashang Hu, Sumit Jain, Brucek Khailany, George Kokai, Kishor Kunal, Xiaowei Li, Charley Lind, Hao Liu, Stuart Oberman, Sujeet Omar, Sreedhar Pratty, Jonathan Raman, Ambar Sarkar, Zhengjiang Shao, Hanfei Sun, Pratik P Suthar, Varun Tej, Walker Turner, Kaizhe Xu, Haoxing (Mark) Ren

VerilogEval: Evaluating Large Language Models for Verilog Code Generation

Mingjie Liu, Nathaniel Pinckney, Brucek Khailany, Haoxing (Mark) Ren

Late Breaking Results: Test Selection For RTL Coverage By Unsupervised Learning From Fast Functional Simulation

Rongjian Liang, Nathaniel Pinckney, Yuji Chai, Haoxing (Mark) Ren, Brucek Khailany

Efficient Transformer Inference with Statically Structured Sparse Attention

Steve Dai, Hasan Genc, Rangharajan Venkatesan, Brucek Khailany

Physics-Informed Optical Kernel Regression Using Complex-valued Neural Fields

Guojin Chen, Zehua Pei, Haoyu Yang, Yuzhe Ma, Bei Yu, Martin Wong

A 0.190-pJ/bit 25.2-Gb/s/wire Inverter-Based AC-Coupled Transceiver for Short-Reach Die-to-Die Interfaces in 5-nm CMOS

Yoshinori Nishi, John W. Poulton, Xi Chen, Sanquan Song, Brian Zimmer, Walker Turner, Stephen Tell, Nikola Nedovic, John Wilson, William Dally, Tom Gray

A 9.7fJ/Conv.-Step Capacitive Sensor Readout Circuit with Incremental Zoomed Time Domain Quantization

Zilong Shen, Xiyuan Tang, Zhongyi Wu, Haoyang Luo, Zongnan Wang, Mingjie Liu, Xing Zhang, Yuan Wang

A 0.297-pJ/Bit 50.4-Gb/s/Wire Inverter-Based Short-Reach Simultaneous Bi-Directional Transceiver for Die-to-Die Interface in 5-nm CMOS

Yoshinori Nishi, John W. Poulton, Walker Turner, Xi Chen, Sanquan Song, Brian Zimmer, Stephen Tell, Nikola Nedovic, John Wilson, William Dally, Tom Gray

Reinforcement Learning Guided Detailed Routing for Custom Circuits

Hao Chen, Kai-Chieh Hsu, Walker Turner, Po-Hsuan Wei, Keren Zhu, David Z. Pan, Haoxing (Mark) Ren

ISPD

DREAM-GAN: Advancing DREAMPlace towards Commercial-Quality using Generative Adversarial Learning

Yi-Chen Lu, Haoxing (Mark) Ren, Hao-Hsiang Hsiao, Sung Kyu Lim

ISPD

NVCell 2: Routability-Driven Standard Cell Layout in Advanced Nodes with Lattice Graph Routability Model

Chia-Tung (Mark) Ho, Alvin Ho, Matt Fojtik, Minsoo Kim, Shang Wei, Yaguang LI, Brucek Khailany, Haoxing (Mark) Ren

ISPD

AutoDMP: Automated DREAMPlace-based Macro Placement

Anthony Agnesina, Puranjay Rajvanshi, Tian Yang, Geraldo Pradipta, Austin Jiao, Ben Keller, Brucek Khailany, Haoxing (Mark) Ren

ISPD

On Legalization of Die Bonding Bumps and Pads for 3D ICs

Sai Pentapati, Anthony Agnesina, Moritz Brunion, Yen-Hsiang Huang, Sung Kyu Lim

ISPD

Enabling Scalable AI Computational Lithography with Physics-Inspired Models

Haoyu Yang, Haoxing (Mark) Ren

Beyond CPO: A Motivation and Approach for Bringing Optics onto the Silicon Interposer

Ben Lee, Nikola Nedovic, Trey Greer, Tom Gray

A 95.6-TOPS/W Deep Learning Inference Accelerator With Per-Vector Scaled 4-bit Quantization in 5 nm

Ben Keller, Rangharajan Venkatesan, Steve Dai, Stephen Tell, Brian Zimmer, Charbel Sakr, William Dally, Tom Gray, Brucek Khailany

BufFormer: A Generative ML Framework for Scalable Buffering

Rongjian Liang, Siddhartha Nath, Anand Rajaram, Jiang Hu, Haoxing (Mark) Ren

2022

Efficient Arithmetic Block Identification with Graph Learning and Network-flow

Ziyi Wang, Zhuolun He, Chen Bai, Haoyu Yang, Bei Yu

An Adversarial Active Sampling-based Data Augmentation Framework for Manufacturable Chip Design

Mingjie Liu, Haoyu Yang, Zongyi Li, Kumara Sastry, Saumyadip Mukhopadhyay, Selim Dogru, Anima Anandkumar, David Z. Pan, Brucek Khailany, Haoxing (Mark) Ren