Research

Select Publications

Metering for Exposure Stacks

"Metering for Exposure Stacks"
Orazio Gallo (NVIDIA), Marius Tico (Nokia Research Center), Roberto Manduchi (UC Santa Cruz), Natasha Gelfand (Nokia Research Center), Kari Pulli (NVIDIA), in Eurographics 2012, May 2012

Parallel Incomplete-LU and Cholesky Factorization in the Preconditioned Iterative Methods on the GPU

"Parallel Incomplete-LU and Cholesky Factorization in the Preconditioned Iterative Methods on the GPU"
Maxim Naumov (NVIDIA), May 2012

A Path Space Extension for Robust Light Transport Simulation

"A Path Space Extension for Robust Light Transport Simulation"
Toshiya Hachisuka (Aarhus University), Jacopo Pantaleoni (NVIDIA), Henrik W. Jensen (UCSD), in NVIDIA Technical Report NVR-2012-001, April 2012

A Hierarchical Thread Scheduler and Register File for Energy-Efficient Throughput Processors

"A Hierarchical Thread Scheduler and Register File for Energy-Efficient Throughput Processors"
Mark Gebhart (UT Austin), Daniel R. Johnson (UIUC), David Tarjan (NVIDIA), Stephen Keckler (NVIDIA), William Dally (NVIDIA), Erik Lindholm (NVIDIA), Kevin Skadron (University of Virginia), in ACM Transactions on Computer Systems (TOCS), April 2012

Scalable GPU Graph Traversal

"Scalable GPU Graph Traversal"
Duane Merrill (NVIDIA), Michael Garland (NVIDIA), Andrew Grimshaw (University of Virginia), in 17th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPoPP'12), Feb 2012